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A Compiled Implementation of Strong Reduction
"... Motivated by applications to proof assistants based on dependent types, we develop and prove correct a strong reducer and b equivalence checker for the lcalculus with products, sums, and guarded fixpoints. Our approach is based on compilation to the bytecode of an abstract machine performing weak ..."
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Cited by 69 (5 self)
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Motivated by applications to proof assistants based on dependent types, we develop and prove correct a strong reducer and b equivalence checker for the lcalculus with products, sums, and guarded fixpoints. Our approach is based on compilation to the bytecode of an abstract machine performing weak reductions on nonclosed terms, derived with minimal modifications from the ZAM machine used in the Objective Caml bytecode interpreter, and complemented by a recursive "read back" procedure. An implementation in the Coq proof assistant demonstrates important speedups compared with the original interpreterbased implementation of strong reduction in Coq.
A Brief Overview of HOL4
 In Theorem Proving in Higher Order Logics, TPHOLs
, 2008
"... Abstract. The HOL4 proof assistant supports specification and proof in classical higher order logic. It is the latest in a long line of similar systems. In this short overview, we give an outline of the HOL4 system and how it may be applied in formal verification. 1 ..."
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Cited by 30 (3 self)
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Abstract. The HOL4 proof assistant supports specification and proof in classical higher order logic. It is the latest in a long line of similar systems. In this short overview, we give an outline of the HOL4 system and how it may be applied in formal verification. 1
Executing the formal semantics of the Accellera Property Specification Language by mechanised theorem proving
 Proc. 12 th Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME 2003), Lecture
, 2003
"... The Accellera Property Specification Language (PSL) is designed for the formal specification of hardware. The Reference Manual contains a formal semantics, which we previously encoded in a machine readable version of higher order logic. In this paper we describe how to `execute' the formal seman ..."
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Cited by 14 (2 self)
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The Accellera Property Specification Language (PSL) is designed for the formal specification of hardware. The Reference Manual contains a formal semantics, which we previously encoded in a machine readable version of higher order logic. In this paper we describe how to `execute' the formal semantics using proof scripts coded in the HOL theorem prover's metalanguage ML. The goal is to see if it is feasible to implement useful tools that work directly from the o#cial semantics by mechanised proof. Such tools will have a high assurance of conforming to the standard. We have implemented two experimental tools: an interpreter that evaluates whether a finite trace w, which may be generated by a simulator, satisfies a PSL formula f (i.e. w f ), and a compiler that converts PSL formulas to checkers in an intermediate format suitable for translation to HDL for inclusion in simulation testbenches. Although our tools use logical deduction and are thus slower than handcrafted implementations, they may be speedy enough for some applications. They can also provide a reference for more e#cient implementations.
Verification of the MillerRabin Probabilistic Primality Test
, 2003
"... Using the HOL theorem prover, we apply our formalization of probability theory to specify and verify the MillerRabin probabilistic primality test. The version of the test commonly found in algorithm textbooks implicitly accepts probabilistic termination, but our own verified implementation satisfie ..."
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Cited by 14 (3 self)
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Using the HOL theorem prover, we apply our formalization of probability theory to specify and verify the MillerRabin probabilistic primality test. The version of the test commonly found in algorithm textbooks implicitly accepts probabilistic termination, but our own verified implementation satisfies the stronger property of guaranteed termination. Completing the proof of correctness requires a significant body of group theory and computational number theory to be formalized in the theorem prover. Once verified, the primality test can either be executed in the logic (using rewriting) and used to prove the compositeness of numbers, or manually extracted to Standard ML and used to find highly probable primes.
A thread of HOL development
 Computer Journal
"... The HOL system is a mechanized proof assistant for higher order logic that has been under continuous development since the mid1980s, by an everchanging group of developers and external contributors. We give a brief overview of various implementations of the HOL logic before focusing on the evoluti ..."
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Cited by 13 (7 self)
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The HOL system is a mechanized proof assistant for higher order logic that has been under continuous development since the mid1980s, by an everchanging group of developers and external contributors. We give a brief overview of various implementations of the HOL logic before focusing on the evolution of certain important features available in a recent implementation. We also illustrate how the module system of Standard ML provided security and modularity in the construction of the HOL kernel, as well as serving in a separate capacity as a useful representation medium for persistent, hierarchical logical theories.
Verifying mixed realinteger quantifier elimination
 IJCAR 2006, LNCS 4130
, 2006
"... We present a formally verified quantifier elimination procedure for the first order theory over linear mixed realinteger arithmetics in higherorder logic based on a work by Weispfenning. To this end we provide two verified quantifier elimination procedures: for Presburger arithmitics and for lin ..."
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Cited by 8 (5 self)
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We present a formally verified quantifier elimination procedure for the first order theory over linear mixed realinteger arithmetics in higherorder logic based on a work by Weispfenning. To this end we provide two verified quantifier elimination procedures: for Presburger arithmitics and for linear real arithmetics.
Generic proof synthesis for presburger arithmetic
, 2003
"... We develop in complete detail an extension of Cooper’s decision procedure for Presburger arithmetic that returns a proof of the equivalence of the input formula to a quantifierfree formula. For closed input formulae this is a proof of their validity or unsatisfiability. The algorithm is formulated ..."
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Cited by 4 (3 self)
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We develop in complete detail an extension of Cooper’s decision procedure for Presburger arithmetic that returns a proof of the equivalence of the input formula to a quantifierfree formula. For closed input formulae this is a proof of their validity or unsatisfiability. The algorithm is formulated as a functional program that makes only very minimal assumptions w.r.t. the underlying logical system and is therefore easily adaptable to specific theorem provers. 1 Presburger arithmetic Presburger arithmetic is firstorder logic over the integers with + and <. Presburger [3] first showed its decidability. We extend Cooper’s decision procedure [1] such that a successful run returns a proof of the input formula. The atomic PAformulae are defined by Atom:
A Compiled Implementation of Normalization by Evaluation
"... Abstract. We present a novel compiled approach to Normalization by Evaluation (NBE) for MLlike languages. It supports efficient normalization of open λterms w.r.t. βreduction and rewrite rules. We have implemented NBE and show both a detailed formal model of our implementation and its verificatio ..."
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Cited by 4 (2 self)
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Abstract. We present a novel compiled approach to Normalization by Evaluation (NBE) for MLlike languages. It supports efficient normalization of open λterms w.r.t. βreduction and rewrite rules. We have implemented NBE and show both a detailed formal model of our implementation and its verification in Isabelle. Finally we discuss how NBE is turned into a proof rule in Isabelle. 1
Verifying ARM6 Multiplication
"... Abstract. The hol4 proof system has been used to formally verify the correctness of the ARM6 microarchitecture. This paper describes the specification and verification of the multiply instructions. The processor’s implementation is based on the modified Booth’s algorithm. Correctness is defined us ..."
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Abstract. The hol4 proof system has been used to formally verify the correctness of the ARM6 microarchitecture. This paper describes the specification and verification of the multiply instructions. The processor’s implementation is based on the modified Booth’s algorithm. Correctness is defined using data and temporal abstraction maps. The ARM6 is a commercial RISC microprocessor that has been used extensively in embedded systems – it has a 3stage pipeline with a multicycled execute stage. This paper describes the approach used in the formal verification and presents some key lemmas. 1
Mechanized quantifier elimination for linear realarithmetic in Isabelle/HOL
"... Abstract. We integrate Ferrante and Rackoff’s quantifier elimination procedure for linear real arithmetic in Isabelle/HOL in two manners: (a) tacticstyle, i.e. for every problem instance a proof is generated by invoking a series of inference rules, and (b) reflection, where the whole algorithm is i ..."
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Abstract. We integrate Ferrante and Rackoff’s quantifier elimination procedure for linear real arithmetic in Isabelle/HOL in two manners: (a) tacticstyle, i.e. for every problem instance a proof is generated by invoking a series of inference rules, and (b) reflection, where the whole algorithm is implemented and verified within Isabelle/HOL. We discuss the performance obtained for both integrations. 1