© 1994 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

Abstract not found

Given a set > of n interconnected processors, some of which may be faulty, the so-called system-level diagnosis is aimed at identifying the faulty processors by analysing the outcomes of the available interprocessor tests. The set of these interprocessor tests must be defined appropriately, with the constraint that processors can only test each other if they are interconnected. Cases of regular or quasi regular interconnection schemes deserve special interest since regular interconnection structures are widely adopted in large parallel machines, and they appear suitable for application to wafer-scale IC-testing. However, the theoretical results of system-level diagnosis are quite poor when applied to regular interconnected systems. For example correct and complete diagnosis of a twodimensional toroidal mesh is only possible if the number of faults does not exceed four, regardless of the size of the system. This thesis introduces a new algorithm for toroidal and non-toroidal meshes, w...