This paper provides an overview of research developments toward nanometer-scale electronic switching devices for use in building ultra-densely integrated electronic computers. Specifically, two classes of alternatives to the field-effect transistor are considered: 1) quantum-effect and single-electron solid-state devices and 2) molecular electronic devices. A taxonomy of devices in each class is provided, operational principles are described and compared for the various types of devices, and the literature about each is surveyed. This information is presented in nonmathematical terms intended for a general, technically interested readership

Abstract — We describe several techniques for using bulk matter for special purpose computation. In each case it is necessary to use an evolutionary algorithm to program the substrate on which the computation is to take place. In addition, the computation comes about as a result of nearest neighbour interactions at the nano- micro- and meso-scale. In our first example we describe evolving a saw-tooth oscillator in a CMOS substrate. In the second example we demonstrate the evolution of a tone discriminator by exploiting the physics of liquid crystals. In the third example we outline using a simulated magnetic quantum dot array and an evolutionary algorithm to develop a pattern matching circuit. Another example we describe exploits the micro-scale physics of charge density waves in crystal lattices. We show that vastly different resistance values can be achieved and controlled in local regions to essentially construct a programmable array of coupled micro-scale quasiperiodic oscillators. Lastly we show an example where evolutionary algorithms could be used to control density modulations, and therefore refractive index modulations, in a fluid for optical computing. I.

This paper analyzes the impact of nano-scale technology on future circuit design and describes several prototypes of logic and memory applications. Resonant tunneling transistors, single electron transistors, and quantum cellular automata are reviewed as relevant nanoelectronic device categories. In regard to the limited interconnectivity and the sensitivity of the devices to parameter variations we discuss bit level systolic arrays, a propagate instruction array processor, and fault tolerant logic. Furthermore, functional integration, that is the possibility of exploiting quantum effects to obtain a function specific behavior, is illustrated as design technique by compact memory cells and logic families with reduced circuit complexity.

Some ideas are presented for achieving lowoverhead reconfigurability in systems built from nanoscale components. Via three example circuits, it is demonstrated how it will be possible to exploit a number of alternative "dimensions" -- apart from the obvious spatial dimension - to construct compact configurable cells. Configurability based on dual gate transistors using RTD-based multi-valued logic and the variable resistance of phase-change films are shown. A high-density non-volatile reconfigurable cell is proposed in which a double junction spin filter tunnel junction is built on a vertical conducting pillar and integrated into a nearest neighbour-connected mesh. Some brief comments are made about how computing applications might exploit such a homogenous non-volatile processing mesh.

1 Introduction In the past 40 years, the metal-oxide semiconductor field effect transistor (MOSFET) has become the basic building block for almost all computing devices. The steady growth of their popularity is due to the steady shrinking of the feature size which at present has reached 0.1 micron. However, the laws of quantum mechanics and limitations of fabrication techniques may soon prevent the further decrease of feature size. Hence, researchers are investigating several alternatives to the transistor for ultra-dense circuitry. These new devices whose dimensions are on the order of tens of nanometers are called nano-devices and their science is termed nano-technology.

Summary. This chapter concerns the design, development, and simulation of nanoprocessor systems integrated on the molecular scale. It surveys ongoing research and development on nanoprocessor architectures and discusses challenges in the implementation of such systems. System simulation is used to identify some advantages, issues, and trade-offs in potential implementations. Previously, the authors and their collaborators considered in detail the requirements and likely performance of nanomemory systems. This chapter recapitulates the essential aspects of that earlier work and builds upon those efforts to examine the likely architectures and requirements of nanoprocessors. For nanoprocessor systems, simulation, as well as design and fabrication, embodies unique problems beyond those introduced by the large number of densely-packed, novel nanodevices. For example, unlike the largely homogeneous structure of circuitry in nanomemory arrays, a high degree of variety and inhomogeneity must be present in nanoprocessors. Also, issues of clocking, signal restoration, and power become much more significant. Thus, building and operating nanoprocessor systems will present significant new challenges and require additional innovations in the application of molecular-scale devices and circuits, beyond those already achieved for nanomemories. New nanoelectronic devices, circuits, and architectures will be necessary to perform the more complex and specialized functions inherent in processing systems at the nanometer scale. This chapter highlights the fundamental design requirements of such nanoprocessor systems, presents various device and design options, and discusses their potential implications for system performance. 1

Abstract—Motion estimation is a major computational task in real-time vision circuits and artificial retinas that require energyefficient, high-speed, and microminiaturized circuitry. Traditionally, the motion estimation is made by means of velocity-tuned filters (VTFs), a class of spatiotemporal signal processing circuitry. However, conventional VTFs have limitations in area, power, and speed for real-time motion computation because they employ bulky and slow analog circuitry. In this paper, we propose a nanoscale VTF that employs quantum dot arrays to perform temporal filtering to track moving and stationary objects. The new velocity-tuned filter is not only amenable for nanocomputing, but also superior to other VTFs in terms of area, power, and speed. We also show that the proposed nanoarchitecture for VTF is asymptotically stable in the specific region where f ′(Sn,m) ≥ 0. Index Terms—Nanoelectronic, quantum dot, resonant tunneling diode (RTD), velocity-tuned filter (VTF). I.