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An EnergyEfficient Reconfigurable PublicKey Cryptography Processor
 IEEE Journal of SolidState Circuits
, 2001
"... The everincreasing demand for security in portable energyconstrained environments that lack a coherent security architecture has resulted in the need to provide energyefficient algorithmagile cryptographic hardware. Domainspecific reconfigurability is utilized to provide the required flexibilit ..."
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Cited by 43 (0 self)
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The everincreasing demand for security in portable energyconstrained environments that lack a coherent security architecture has resulted in the need to provide energyefficient algorithmagile cryptographic hardware. Domainspecific reconfigurability is utilized to provide the required flexibility, without incurring the high overhead costs associated with generic reprogrammable logic. The resulting implementation is capable of performing an entire suite of cryptographic primitives over the integers modulo , binary Galois Fields and nonsupersingular elliptic curves over GF(2 ), with fully programmable moduli, field polynomials and curve parameters ranging in size from 8 to 1024 bits. The resulting processor consumes a maximum of 75 mW when operating at a clock rate of 50 MHz and a 2V supply voltage. In ultralowpower mode (3 MHz at 0.7 V) the processor consumes at most 525 W. Measured performance and energy efficiency indicate a comparable level of performance to previously reported dedicated hardware implementations, while providing all of the flexibility of a softwarebased implementation. In addition, the processor is two to three orders of magnitude more energy efficient than optimized software and reprogrammable logicbased implementations.
HighRadix Montgomery Modular Exponentiation on Reconfigurable Hardware
 IEEE Transactions on Computers
, 2001
"... to appear in the IEEE Transactions on Computers It is widely recognized that security issues will play a crucial role in the majority of future computer and communication systems. Central tools for achieving system security are cryptographic algorithms. This contribution proposes arithmetic architec ..."
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Cited by 34 (3 self)
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to appear in the IEEE Transactions on Computers It is widely recognized that security issues will play a crucial role in the majority of future computer and communication systems. Central tools for achieving system security are cryptographic algorithms. This contribution proposes arithmetic architectures which are optimized for modern field programmable gate arrays (FPGAs). The proposed architectures perform modular exponentiation with very long integers. This operation is at the heart of many practical publickey algorithms such as RSA and discrete logarithm schemes. We combine a high–radix Montgomery modular multiplication algorithm with a new systolic array design. The designs are flexible, allowing any choice of operand and modulus. The new architecture also allows the use of high radices. Unlike previous approaches, we systematically implement and compare several variants of our new architecture for different bit lengths. We provide absolute area and timing measures for each architecture. The results allow conclusions about the feasibility and timespace tradeoffs of our architecture for implementation on commercially available FPGAs. We found that 1024 bit RSA decryption can be done in 3.1 ms with our fastest architecture.
Hardware Implementation of Elliptic Curve Processor over GF(p)
 International Journal of Embedded Systems
, 2003
"... This paper describes a hardware implementation of an arithmetic processor which is efficient for bitlengths suitable for both commonly used types of Public Key Cryptography (PKC), i.e., Elliptic Curve (EC) and RSA Cryptosystems. The processor consists of special operational blocks for Montgomery Mo ..."
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Cited by 31 (6 self)
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This paper describes a hardware implementation of an arithmetic processor which is efficient for bitlengths suitable for both commonly used types of Public Key Cryptography (PKC), i.e., Elliptic Curve (EC) and RSA Cryptosystems. The processor consists of special operational blocks for Montgomery Modular Multiplication, modular addition/substraction, EC Point doubling/addition, modular multiplicative inversion, EC point multiplier, projective to affine coordinates conversion and Montgomery to normal representation conversion.
A Scalable GF(p) Elliptic Curve Processor Architecture for Programmable Hardware
"... This work proposes a new elliptic curve processor architecture for the computation of point multiplication for curves defined over fields GF (p). This is a scalable architecture in terms of area and speed specially suited for memoryrich hardware platforms such a field programmable gate arrays ( ..."
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Cited by 20 (2 self)
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This work proposes a new elliptic curve processor architecture for the computation of point multiplication for curves defined over fields GF (p). This is a scalable architecture in terms of area and speed specially suited for memoryrich hardware platforms such a field programmable gate arrays (FPGAs). This processor uses a new type of highradix Montgomery multiplier that relies on the precomputation of frequently used values and on the use of multiple processing engines.
Implementation Options for Finite Field Arithmetic for Elliptic Curve Cryptosystems
, 1999
"... Contents 1. Motivation 2. Overview on Finite Field Arithmetic 3. Arithmetic in GF(p) 4. Arithmetic in GF(2 m ) 5. Arithmetic in GF(p m ) 6. Open Problems ECC '99 WPI Why PublicKey Algorithms? Traditional tool for data security: Privatekey (or symmetric) cryptography Main applications: ffl En ..."
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Cited by 11 (0 self)
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Contents 1. Motivation 2. Overview on Finite Field Arithmetic 3. Arithmetic in GF(p) 4. Arithmetic in GF(2 m ) 5. Arithmetic in GF(p m ) 6. Open Problems ECC '99 WPI Why PublicKey Algorithms? Traditional tool for data security: Privatekey (or symmetric) cryptography Main applications: ffl Encryption ffl Message Authentication Traditional shortcomings: 1. Key distribution, especially with large, dynamic user population (Internet) 2. How to assure sender authenticity and nonrepudiation? Solution: Publickey schemes, e.g., DiffieHellman key exchange or digital signatures. ECC '99 WPI Practical PublicKey Algorithms There are three families of PK algorithms of practical relevance: Integer Factorization Schemes Exp: RSA, Rabin, etc. required ope
Cryptography on FPGAs: State of the Art Implementations and Attacks
, 1999
"... this paper is devoted to studying FPGAs from a systems security perspective. We do this by looking at attacks documented in the literature against FPGAs as well as attacks that have been performed against other hardware platforms and by adapting them and their solutions to FPGAs. Furthermore, we pro ..."
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Cited by 8 (1 self)
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this paper is devoted to studying FPGAs from a systems security perspective. We do this by looking at attacks documented in the literature against FPGAs as well as attacks that have been performed against other hardware platforms and by adapting them and their solutions to FPGAs. Furthermore, we provide a list of open problems regarding system security of FPGAs
Towards an FPGA Architecture Optimized for PublicKey Algorithms
 in The SPIE’s Symposium on Voice, Video, and Data Communications
, 1999
"... Cryptographic algorithms are constantly evolving to meet security needs, and modular arithmetic is an integral part of these algorithms, especially in the case of publickey cryptosystems. To achieve optimal system performance while maintaining physical security, it is desirable to implement cryptog ..."
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Cited by 4 (1 self)
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Cryptographic algorithms are constantly evolving to meet security needs, and modular arithmetic is an integral part of these algorithms, especially in the case of publickey cryptosystems. To achieve optimal system performance while maintaining physical security, it is desirable to implement cryptographic algorithms in hardware. However, many publickey cryptographic algorithms require the implementation of modular arithmetic, specifically modular multiplication, for operands of 1024 bits in length. Additionally, algorithm agility is required to support algorithm independent protocols, a feature of most modern security protocols. Reprogrammability, particularly insystem reprogrammability, is critical in enabling the switching between cryptographic algorithms required for algorithm independent protocols. Field Programmable Gate Arrays (FPGAs) are a viable option for achieving this goal. Ideally, the targeted FPGA will have been designed with the architectural requirements for wideoper...
Fast BlumBlumShub Sequence Generation Using Montgomery Multiplication
 In IEEE Proceedings of Computers and Digital Techniques
, 2000
"... VLSI modules are proposed for fast, e#cient generation of highthroughput BlumBlumShub (BBS) and BBSlike sequences using Montgomery Multiplication, where postprocessing associated with Montgomery's algorithm can be eliminated. 2 1 Introduction Public key cryptosystems ensure secrecy between c ..."
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Cited by 2 (0 self)
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VLSI modules are proposed for fast, e#cient generation of highthroughput BlumBlumShub (BBS) and BBSlike sequences using Montgomery Multiplication, where postprocessing associated with Montgomery's algorithm can be eliminated. 2 1 Introduction Public key cryptosystems ensure secrecy between communicating parties without the need to distribute secret keys. The most famous public key cryptosystem is that devised by Rivest, Shamir, and Adleman (RSA) [1]. Another lesserknown public key cryptosystem is the Quadratic Residue Cipher (QRC) introduced by Blum, Blum, and Shub [2], which relies on the ease of squaring an integer, mod n, as compared to the intractability of finding the square root of a number, mod n when n is large. As with RSA the valid recipient publishes the prime factors of n, where n = pq and p and q are strong primes. The sender scrambles his message with a bit sequence (BlumBlumShub Sequence, BBS) comprised of the concatenation of the least significant bits of a s...
Applications of the Montgomery exponent
 International Conference on Information Technology: Coding and Computing
, 2005
"... We define here the Montgomery Exponent of order s, modulo the odd integer N, by MEXP = MEXP(A, X, N, s) = A X 2 −s(X−1) (mod N), and illustrate some properties and usage of this operator. We show how A X (mod N) can be obtained from MEXP(A, X, N, s) by one Montgomery multiplication. This provides a ..."
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Cited by 2 (0 self)
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We define here the Montgomery Exponent of order s, modulo the odd integer N, by MEXP = MEXP(A, X, N, s) = A X 2 −s(X−1) (mod N), and illustrate some properties and usage of this operator. We show how A X (mod N) can be obtained from MEXP(A, X, N, s) by one Montgomery multiplication. This provides a new modular exponentiation algorithm that uses one Montgomery multiplication less than the number required with the standard method. The resulting reduction in the computation time and code size is significant when the exponent X is short (e.g., modular squaring and RSA verification). We also illustrate the potential advantage in performance and code size when known cryptographic applications are modified to allow for using MEXP as the analogue of modular exponentiation.
Accelerating the Secure Remote Password Protocol Using Reconfigurable Hardware
, 2004
"... The Secure Remote Password (SRP) protocol is an authentication and keyexchange protocol suitable for secure password verification and session key generation over insecure communication channels. The modular exponentiations involved, however, are very timeconsuming, causing slow logon procedures. T ..."
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The Secure Remote Password (SRP) protocol is an authentication and keyexchange protocol suitable for secure password verification and session key generation over insecure communication channels. The modular exponentiations involved, however, are very timeconsuming, causing slow logon procedures. This work presents the design of a hardware accelerator that performs modular exponentiation of very wide integers. The experimental platform is tutwlan, a Wireless Local Area Network (wlan) being developed at Tampere University of Technology. It runs on the Altera Excalibur development board that contains a microprocessor and a chip with programmable hardware. The results show that a full modular exponentiation with 1023bit inputs can be performed in less than 40 ms using less than 10,000 logic elements, each consisting of a 4input lookup table and a register. By using the implemented hardware accelerator in the authentication protocol, the execution time is reduced by a factor of 4. In addition, proposals to improve the implemented modular exponentiation architecture are presented. An additional factor of 5 improvement (totaling a factor of 20) can be achieved by implementing the fastest design.