Instruction selection is a key component of code generation. High quality instruction selection is of particular importance in the embedded space where complex instruction sets are common and code size is a prime concern. Although instruction selection on tree expressions is a well understood and easily solved problem, instruction selection on directed acyclic graphs is NP-complete. In this paper we present NOLTIS, a near-optimal, linear time instruction selection algorithm for DAG expressions. NOLTIS is easy to implement, fast, and effective with a demonstrated average code size improvement of 5.1 % compared to the traditional tree decomposition and tiling approach.

Optimal integrated code generation is a challenge in terms of problem complexity, but it provides important feedback for the resource-efficient design of embedded systems and is a valuable tool for the assessment of fast heuristics for code generation. We present a method for energy optimal integrated code generation for generic VLIW processor architectures that allows to explore trade-offs between energy consumption and execution time. 1

Code generation is a complex task. From a software engineering point of view it is more convenient to split this complex task into subtasks that are simpler to deal with. This phased decoupled code generation is illustrated in Figure 1 by following any path along the edges

High quality code generation for irregular architectures, such as Digital Signal Processors, is a complex task, as it requires a fully integrated approach that simultaneously deals with the most important tasks of instruction selection, register allocation and instruction scheduling.