Abstract. This paper presents a framework for designing, verifying, and evaluating register allocation algorithms. The proposed framework has three main components. The first component is MIRA, a language for describing programs prior to register allocation. The second component is FORD, a language that describes the results produced by the register allocator. The third component is a type checker for the output of a register allocator which helps to find bugs. To illustrate the effectiveness of the framework, we present RALF, a tool that allows a register allocator to be integrated into the gcc compiler for the StrongARM architecture. RALF simplifies the development of register allocators by sheltering the programmer from the internal complexity of gcc. MIRA and FORD’s features are sufficient to implement most of the register allocators currently in use and are independent of any particular register allocation algorithm or compiler. To demonstrate the generality of our framework, we have used RALF to evaluate eight different register allocators, including iterated register coalescing, linear scan, a chordal based allocator, and two integer linear programming approaches.

Nearly all algorithms for code optimization use a control flow graph. In this thesis, I will show that with very minor restrictions on program structure, an abstract syntax tree can be used instead, leading to algorithms that are often much simpler than their graphbased counterparts. The conclusion is that abstract syntax trees, not control flow graphs, should be the fundamental data structure in code optimization. 1 Introduction Most optimizing compilers consist of a front-end that does syntactic and semantic analysis, and a back-end that does optimization and machine code generation [ASU86]. The main data structure in the front-end is an abstract syntax tree (AST), while in the back-end it is a control flow graph (CFG), which consists of nodes representing computations and edges representing control flow. Thus, code optimization operates on a data structure---the CFG---in which the program has essentially been "flattened" into a tangle of GOTOs (edges). Unlike an AST, a CFG c...

Graph coloring algorithms have been shown to be an efficient and effective means of performing global register allocation. The power and appeal of these algorithms lie in their strong coloring heuristics and their ability to abstract away seemingly disparate allocation problems such as data-flow constraints, conforming to compiler calling conventions and restrictions due to machine specific details. However, even optimal graph coloring algorithms cannot color every graph. For uncolorable graphs, some live ranges must be spilled to memory to make room for others. The amount of spill code generated and its location can greatly affect a program's performance, so great care should be taken to minimize the amount of spill code inserted. Previous spill code minimization techniques by Chaitin et al. at IBM Yorktown and Bernstein et al. at IBM Haifa have been limited to minimizing spill code on a basic block level. This thesis presents several new global techniques which can be used in conjunc...

High quality code generation for irregular architectures, such as Digital Signal Processors, is a complex task, as it requires a fully integrated approach that simultaneously deals with the most important tasks of instruction selection, register allocation and instruction scheduling.

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