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A 13-bit, 1.4-MS/s Sigma-Delta Modulator for RF Baseband Channel Applications
- IEEE J. Solid-State Circuits
, 1998
"... modulator oversampling at 16 X is implemented in a 0.72 "m complementary metal–oxide–semiconductor process for use in the baseband path of a radio-frequency receiver. The modulator achieves 77 dB of dynamic range and dissipates 81 mW from a 3.3 V supply. It is characterized for the blocking and ..."
Abstract
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Cited by 8 (1 self)
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modulator oversampling at 16 X is implemented in a 0.72 "m complementary metal–oxide–semiconductor process for use in the baseband path of a radio-frequency receiver. The modulator achieves 77 dB of dynamic range and dissipates 81 mW from a 3.3 V supply. It is characterized for the blocking and intermodulation requirements of a cordless telephone application. Index Terms—Analog–digital conversion, radio receivers, sampled-data circuits, sigma–delta modulation, switched-capacitor circuits. I.
Programmable, High-Dynamic Range Sigma-Delta A/D Converter for Multistandard, Fully-Integrated CMOS RF Receiver
, 1998
"... A major focus of recent RF transceiver IC designs has been to increase both the integration and adaptability to multiple RF communication standards. Performing channel selection on chip at baseband allows the use of high-integration receiver architectures, and enhances programmability to different c ..."
Abstract
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A major focus of recent RF transceiver IC designs has been to increase both the integration and adaptability to multiple RF communication standards. Performing channel selection on chip at baseband allows the use of high-integration receiver architectures, and enhances programmability to different channel bandwidths and dynamic range requirements of multiple RF standards. A wideband, high-dynamic range sigma-delta modulator can be used to digitize both the desired signal and potentially stronger adjacent-channel interferers. In the digital domain, the decimation filter following the ADC can be easily made programmable. A 4th-order sigma-delta ADC which is capable of adapting to GSM (cellular) and DECT (cordless) communication standards is described. The ADC achieves 14 bits of resolution at 128x oversampling ratio (200kS/s Nyquist rate) for GSM, and 12 bits of i resolution at 32x oversampling ratio (1.4MS/s Nyquist rate) for DECT. Power reduction strategies are developed at both the sigma-delta architecture and circuit design levels. The experimental prototype, fabricated in a 0.35μm CMOS process, dissipates 70mW from a 3.3V supply.

