In this paper we propose a RObust Analog Design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthesis based on simplified models, ROAD extracts accurate posynomial performance models via transistor-level simulation and optimizes the circuit by geometric programming. Importantly, ROAD sets up all design constraints to include large-scale process variations to facilitate the tradeoff between yield and performance. A novel convex formulation of the robust design problem is utilized to improve the optimization efficiency and to produce a solution that is superior to other local tuning methods. In addition, a novel projection-based approach for posynomial fitting is used to facilitate scaling to large problem sizes. A new implicit power iteration algorithm is proposed to find the optimal projection space and extract the posynomial coefficients with robust convergence. The efficacy of ROAD is demonstrated on several circuit examples. 1.

Abstract — This paper presents a design automation tool for continuous-time Sigma-Delta modulators from high level specifications down to Layout. System level synthesis, circuit synthesis as well as layout synthesis are performed in the CAIRO+ design environment. Strong interaction between the system level and the circuit level is used to optimize the final design. The design of a complete third order currentmode continuous-time Sigma-Delta modulator is taken as an example to show the effectiveness of the proposed design methodology.