Design of Analog Integrated Circuits and Systems (1994)

by K R Laker, W M C Sansen
Venue:P W=24U L=2U *N differential stage and bias M5 10 1 7 5 N W=80U L=2U M6 11 2 7 5 N W=80U L=2U M7 7 9 5 5 N W=16U L=2U M8 9 9 5 5 N W=8U L=2U *P-type stacked current mirror M9 10 10 4 4 P W=39U L=2U MIO 11 10 4 4 P W=39U L=2U Ml 1 12 12 10 4 P W=39U L=2U M