Abstract not found

As chip complexity explodes and compressed product development cycles relentlessly scale time-tomarket pressures, designers must accomplish more ambitious objectives in less time. For an increasing number of designers, the secret to quickly building highly integrated systems on a chip (SoCs) in a shrinking development cycle lies in the extensive reuse of silicon-proven megafunctions or blocks.

Abstract: An attempt is made to predict the thermal noise and the shot noise for silicon strip detectors connected to the Beetle preamplifier from basic electronic noise principles. The calibration pulse shapes are used to determine the frequency dependant gain function of the Beetle. The calculated noise values are compared with measurements on the prototype ladders. In addition the signal propagation in the very long ladders is studied using a spice simulation. From this the effect of the thermal noise originating from the ohmic resistors of the detector readout strips is estimated.

We present a method for designing operational amplifiers using reversed geometric programming, which is an extension of geometric programming that allows both convex and non-convex constraints. Adding a limited set of non-convex constraints can improve the accuracy of convex equationbased optimization, without compromising global optimality. These constraints allow increased accuracy for critical modeling equations, such as the relationship between gm and Ips. To demonstrate the design methodology, a foldedcascode amplifier is designed in a 0.18'pm technology for varying speed requirements and is compared with simnlations and designs obtained from geometric programming. Categories and Subject Descriptors: