In this PhD. research it is proposed to analyze, design and evaluate a dynamically reconfigurable hardware architecture for elliptic curve cryptography (ECC). Such architecture is a proposal to solve the interoperability problem in ECC. Different to work reported in the literature, in which the ECC architecture needs to be reconfigured off line to support different security levels, the proposed architecture aims to make possible mobile devices can adapt to different security levels at runtime. 1.

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This paper reports a run-time reconfigurable coprocessor for scalar multiplication in elliptic curve cryptography. By reconfiguration, the co-processor can support various finite field orders and hence, different security levels. This is a contribution to solve the current interoperability problems in elliptic curve cryptography. We report the co-processor hardware organization and the cost in terms of area and speed of the reconfigurable solution compared to a static implementation. 1.

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Efficient and high-performance implementation of point multiplication is crucial for elliptic curve cryptosystems. In this paper, we present a new double point multiplication algorithm based on differential addition chains. We use our scheme to implement single point multiplication on binary elliptic curves with efficiently computable endomorphisms. Our proposed scheme has a uniform structure and has some degree of built-in resistance against side channel analysis attacks. We design a crypto-processor based on the proposed algorithm for double point multiplication and evaluate its area and time efficiency on FPGA. To the best of the authors ’ knowledge, this is the first hardware implementation of single point multiplication (using double point multiplication) on elliptic curves with efficiently computable endomorphisms. Our analysis and timing results show that the expected acceleration in point multiplication is considerable. Prototypes of the proposed architectures are implemented and experimental results are presented.

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