Abstract. Recent developments in modeling stream of variation in multistage manufacturing system along with the urgent need for yield enhancement in the semiconductor industry has led to complex large scale simulation problems in design and performance prediction, thus challenging current Monte Carlo (MC) based simulation techniques. MC method prevails in statistical simulation approaches for multi-dimensional cases with general (i.e., non-Gaussian) distributions and/or complex response functions. A method is proposed based on number theory (NT-net) to reduce computing effort and the variability of MC’s results in tolerance design and circuit performance simulation. The sampling strategy is improved by introducing NT-net that can provide better convergent rate over MC. The new method is presented and verified using several case studies, including analytical and industrial cases of a filter design and analyses of a four-bar mechanism. Results indicate a 90–95 % reduction of computation effort with significant improvement in accuracy that can be achieved by the proposed technique. Key Words: tolerance analysis, Monte Carlo simulation

Abstract—This paper demonstrates the advantages of modeling semiconductor process variability using a multivariate nested distribution. This distribution allows estimation not only of correlation among various model parameters, but also allows each of those variations to be apportioned among the various stages of the process (i.e., wafer-to-wafer, lot-to-lot, etc.). This permits matched devices to be more accurately simulated, without having to develop customized models for each configuration of matching. The technique also provides focus for process improvement efforts into those areas with the maximum potential reward. Test structures have been designed and fabricated to facilitate extraction of the parameters for the multivariate nested distribution. Using data from a sample of these structures, a process model is built and analyzed. Monte Carlo techniques are then employed using SPICE and a probabilistic process model to predict the performance of a multiplying digital-to-analog converter (MDAC), and the results are compared to measured data from fabricated circuits. Simulations performed using a model built using the multivariate nested approach are shown to provide superior results when compared to simulations using currently accepted multivariate normal models.

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Towards predictable deep-submicron manufacturing