No silicon fabrication and characterization of circuits with topologies designed by evolution has been done before, leaving open questions about the feasibility of the evolutionary design approach, as well as on how high-performance, robust, or portable such designs could really be when implemented in hardware. This paper is the first to report on a silicon implementation of circuits evolved in simulation. Several circuits were evolved and fabricated in 0.5-micron CMOS process; this paper focuses on results of logical gates evolved at transistor level. It discusses the steps taken in order to increase the chances of robust and portable designs, summarizes the results of characterization tests based on chip measurements, and comments on the performance comparing to simulations. 1.

We describe a parallel genetic algorithm (GA) that automatically generates circuit designs using evolutionary search. A circuit-construction programming language is introduced and we show how evolution can generate practical analog circuit designs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. We present experimental results as applied to analog filter and amplifier design tasks.

The paper presents an evolutionary approach to the design of fault-tolerant VLSI (very large scale integrated) circuits using EHW (evolvable hardware). The EHW research area comprises a set of applications where GA (genetic algorithm) are used for the automatic synthesis and adaptation of electronic circuits. EHW is particularly suitable for applications requiring changes in task requirements and in the environment or faults, through its ability to reconfigure the hardware structure dynamically and autonomously. This capacity for adaptation is achieved via the use of GA search techniques. In our experiments, a fine-grained CMOS (complementary metal-oxide silicon) FPTA (field-programmable transistor array) architecture is used to synthesize electronic circuits. The FPTA is a reconfigurable architecture, programmable at the transistor level and specifically designed for EHW applications. The paper demonstrates the power of EA to design analog and digital fault-tolerant circuit. It compares two methods to achieve fault-tolerant design, one based on fitness definition and the other based on population.

Many genetic algorithms use binary string or tree representations. We have developed a novel crossover operator for a directed and undirected graph representation, and used this operator to evolve molecules and circuits. Unlike strings or trees, a single point in the representation cannot divide every possible graph into two parts, because graphs may contain cycles. Thus, the crossover operator is non-trivial. A steady-state, tournament selection genetic algorithm code (JavaGenes) was written to implement and test the graph crossover operator. The JavaGenes code has evolved pharmaceutical drug molecules and simple digital circuits. Results to date suggest that JavaGenes can evolve moderate sized drug molecules and very small circuits in reasonable time. Since the representation strongly affects genetic algorithm performance, adding graphs to the evolutionary programmer's bag-of-tricks should be beneficial.

The study of evolutionary approaches to create electrical circuits is becoming increasingly widespread. This paper will present early results in evolving electrically implementable dynamical neural networks that correct several classes of arrhythmia in a simulated human heart. In addition to assessing the quality of the evolved circuits, we will examine how the evolved circuits differ from traditional pacemakers and consider what implications these differences may hold. We will also propose some objective function improvements that should increase the number of effective evolved controllers R R

In this paper, a new method for evolving simple electronic circuits is discussed, with the aim of improving the reliability and performance of basic circuit blocks. Next-generation CMOS device models will be used in the simulation of circuits. Circuits are mapped to a grid layout which reflects the appearance of conventional schematic blocks. The performance of the system at designing passive lowpass filters is discussed, with an outline given of the intended future steps, towards the goal of integrating sub 100 nm MOSFET models into the circuits.

Abstract. Graphs are powerful and versatile data structures, useful to represent complex and structured information of interest in various fields of science and engineering. We present a system, called EvoGeneS, based on an evolutionary approach, for generating undirected graphs whose number of nodes is not a priori known. The method is based on a special data structure, called multilist, which encodes undirected attributed relational graphs. Two novel crossover and mutation operators are defined in order to evolve such structure. The developed system has been tested on a wireless network configuration and the results compared with those obtained by a genetic programming based approach recently proposed in the literature. 1