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A formally verified compiler backend
, 2008
"... This article describes the development and formal verification (proof of semantic preservation) of a compiler back-end from Cminor (a simple imperative intermediate language) to PowerPC assembly code, using the Coq proof assistant both for programming the compiler and for proving its correctness. Su ..."
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Cited by 29 (8 self)
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This article describes the development and formal verification (proof of semantic preservation) of a compiler back-end from Cminor (a simple imperative intermediate language) to PowerPC assembly code, using the Coq proof assistant both for programming the compiler and for proving its correctness. Such a verified compiler is useful in the context of formal methods applied to the certification of critical software: the verification of the compiler guarantees that the safety properties proved on the source code hold for the executable compiled code as well. Categories and Subject Descriptors: F.3.1 [Logics and meanings of programs]: Specifying and verifying and reasoning about programs—Mechanical verification; D.2.4 [Software engineering]: Software/program verification—Correctness proofs, formal methods, reliability; D.3.4 [Programming languages]: Processors—Compilers, optimization
HOL-Boogie -- An interactive prover-backend for the Verifiying C Compiler
"... Boogie is a verification condition generator for an imperative core language. It has front-ends for the programming languages C# and C enriched by annotations in first-order logic, i. e. pre- and postconditions, assertions, and loop invariants. Moreover, concepts like ghost fields, ghost variables, ..."
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Cited by 6 (4 self)
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Boogie is a verification condition generator for an imperative core language. It has front-ends for the programming languages C# and C enriched by annotations in first-order logic, i. e. pre- and postconditions, assertions, and loop invariants. Moreover, concepts like ghost fields, ghost variables, ghost code and specification functions have been introduced to support a specific modeling methodology. Boogie’s verification conditions — constructed via a wp calculus from annotated programs — are usually transferred to automated theorem provers such as Simplify or Z3. This also comprises the expansion of language-specific modeling constructs in terms of a theory describing memory and elementary operations on it; this theory is called a machine/memory model. In this paper, we present a proof environment, HOL-Boogie, that combines Boogie with the interactive theorem prover Isabelle/HOL, for a specific C front-end and a machine/memory model. In particular, we present specific techniques combining automated and interactive proof methods for code verification. The main goal of our environment is to help program verification engineers in their task to “debug” annotations and to find combined proofs where purely automatic proof attempts fail.
Data-Flow Based Detection of Loop Bounds
- In Workshop on Execution-Time Analysis (WCET
, 2007
"... To calculate the WCET of a program, safe upper bounds on the number of loop iterations for all loops in the program are needed. As the manual annotation of all loops with such bounds is difficult and time consuming, the WCET analyzer aiT originally developed by Saarland University and AbsInt GmbH us ..."
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Cited by 4 (1 self)
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To calculate the WCET of a program, safe upper bounds on the number of loop iterations for all loops in the program are needed. As the manual annotation of all loops with such bounds is difficult and time consuming, the WCET analyzer aiT originally developed by Saarland University and AbsInt GmbH uses static analysis to determine the needed bounds as far as possible. This paper describes a novel data-flow based analysis for aiT to calculate the needed loop bounds on the assembler level. The new method is compared with a pattern based loop analysis already in use by this tool. 1.
A.: Pervasive verification of an OS microkernel: Inline assembly, memory consumption, concurrent devices
, 2010
"... Abstract. We report on the first formal pervasive verification of an operating system microkernel featuring the correctness of inline assembly, large non-trivial C portions, and concurrent devices in a single seamless formal proof. We integrated all relevant verification results we had achieved so f ..."
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Cited by 2 (2 self)
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Abstract. We report on the first formal pervasive verification of an operating system microkernel featuring the correctness of inline assembly, large non-trivial C portions, and concurrent devices in a single seamless formal proof. We integrated all relevant verification results we had achieved so far [21,20,2,5,4] into a single top-level theorem of microkernel correctness. This theorem states the simulation of user processes with own, separate virtual memories — via the microkernel — by the underlying hardware with devices. All models, theorems, and proofs are formalized in the interactive proof system Isabelle/HOL. 1
Combining Advanced Formal Hardware Verification Techniques
, 2007
"... To my parents, Henry and Karen Reeber, and my fiancée, Carrie Pankrast, for all their love, guidance, and support. Acknowledgments Most of all, I would like to thank my thesis advisor, Warren Hunt. Warren always has the amazing ability to give me what I need, before I even ask for it. Furthermore, W ..."
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Cited by 1 (0 self)
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To my parents, Henry and Karen Reeber, and my fiancée, Carrie Pankrast, for all their love, guidance, and support. Acknowledgments Most of all, I would like to thank my thesis advisor, Warren Hunt. Warren always has the amazing ability to give me what I need, before I even ask for it. Furthermore, Warren has been a source of constant encouragement and guidance, without which I never would have started this dissertation, let alone completed it. I would also like to thank the rest of my dissertation committee, Allen Emerson, Steve Keckler, J Moore, and Anna Slobodova, for all the time and energy they spent re-viewing my research and for their great feedback both on the dissertation itself and the earlier dissertation proposal. Anna in particular provided me with copious notes that have significantly improved the quality of this dissertation. Thanks also to Sandip Ray, Simha Sethumadhavan, and Jun Sawada for providing excellent feedback on portions of this dis-sertation. A number of professors at the University of Texas have influenced my work. My
On the Verification of Memory . . .
, 2005
"... We define physical machines as processors with physical memory and swap memory; in user mode physical machines support address translation. We report about the formal verification of a complex processor supporting address translation by means of a memory management unit (MMU). We give a paper and pe ..."
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We define physical machines as processors with physical memory and swap memory; in user mode physical machines support address translation. We report about the formal verification of a complex processor supporting address translation by means of a memory management unit (MMU). We give a paper and pencil proof that physical machines together with
Foundational High-level Static Analysis
"... A formal method (e.g., of software verification) is foundational if it proves program properties from the axioms of logic and from a low-level machine specification (ISA or transistors). The proofs should be machine-checked, because hand-checked proofs don’t track real software systems well. With re ..."
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A formal method (e.g., of software verification) is foundational if it proves program properties from the axioms of logic and from a low-level machine specification (ISA or transistors). The proofs should be machine-checked, because hand-checked proofs don’t track real software systems well. With recent advances on several fronts (in static analysis, semantics, compiler verification) it is now feasible to put scalable, fully automatic program analyses (such as shape analysis of concurrent C programs) on a foundational footing.
Lyrebird —Assigning Meanings to Machines
"... This paper presents work in progress on the Lyrebird framework, consisting of a language for specifying the programmervisible behaviour of a processor and its associated devices, a tool forautomaticallyproducingafast simulator, and a formal semantic interpretation providing a machine model for use i ..."
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This paper presents work in progress on the Lyrebird framework, consisting of a language for specifying the programmervisible behaviour of a processor and its associated devices, a tool forautomaticallyproducingafast simulator, and a formal semantic interpretation providing a machine model for use in an interactive theorem prover. Machine specifications are modular, providingabstractinterfacesandstructuralparameterization (MMU-lessprocessors,forexample). Alsopresentedisa specific example: An instantiation for the ARM1136jf-s core. 1
I E R S
, 2005
"... We show how to construct a formal model of concurrently executed and communicating applications in an operating system environment. We will identify the necessary steps for building and linking abstract models of a processor, a micro kernel, and a user level operating system. The result is the outli ..."
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We show how to construct a formal model of concurrently executed and communicating applications in an operating system environment. We will identify the necessary steps for building and linking abstract models of a processor, a micro kernel, and a user level operating system. The result is the outline of a formal framework that allows to prove the pervasive correctness of applications running on top of the operating system. Eidesstattliche Erklärung Hiermit erkläre ich, Eyad Alkassar, an Eides statt, dass ich die vorliegende Arbeit selbstständig verfasst und keine anderen als die angegebenen Quellen und Hilfsmittel verwendet habe. Saarbrücken, im Juni 2005 Danksagung

