Abstract — This paper presents a patterned ground shield inserted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1–2 GHz, the addition of the shield increases the inductor quality factor up to 33 % and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz vg tank can be nearly doubled with a shielded inductor. Index Terms — Inductor, inductor model, patterned ground shield, quality factor, self-resonance, substrate loss, substrate noise coupling. I.

Rapid growth in the portable communications market has pushed designers to seek low-cost, low-power, highly integrated solutions for the RF transceiver. A number of recent efforts have concentrated on integrating many of the discrete radio receiver components in a low-cost silicon process such as CMOS [1][2]. This paper describes a prototype of a monolithic CMOS receiver that combines RF and baseband functionality by taking the carrier signal at the LNA input and producing a 10-bit digital baseband waveform. A Wide-Band Intermediate Frequency Double Conversion (WBIFDC) architecture is utilized to remove the need for external narrow-band IF filters.

Abstract—This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance. Index Terms—Eddy currents, inductor model, on-chip inductors, quality factor, self resonance, substrate loss. I.

We present a technique for enhancing the bandwidth of gigahertz broad-band circuitry by using optimized on-chip spiral inductors as shunt-peaking elements. The series resistance of the on-chip inductor is incorporated as part of the load resistance to permit a large inductance to be realized with minimum area and capacitance. Simple, accurate inductance expressions are used in a lumped circuit inductor model to allow the passive and active components in the circuit to be simultaneously optimized. A quick and efficient global optimization method, based on geometric programming, is discussed. The bandwidth extension technique is applied in the implementation of a 2.125-Gbaud preamplifier that employs a common-gate input stage followed by a cascoded common-source stage. On-chip shunt peaking is introduced at the dominant pole to improve the overall system performance, including a 40% increase in the transimpedance. This implementation achieves a 1.6-k\Omega transimpedance and a 0.6- A i...

Abstract—A modification of stacked spiral inductors increases the self-resonance frequency by 100 % with no additional processing steps, yielding values of 5 to 266 nH and self-resonance frequencies of 11.2 to 0.5 GHz. Closed-form expressions predicting the self-resonance frequency with less than 5 % error have also been developed. Stacked transformers are also introduced that achieve voltage gains of 1.8 to 3 at multigigahertz frequencies. The structures have been fabricated in standard digital CMOS technologies with four and five metal layers. Index Terms—Inductors, oscillators, quality factor, RF circuits, self-resonance frequency, stacked spirals, transformers, tuned amplifiers.

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Abstract—In this paper, a closed-form integral representation for the eddy-current losses over a conductive substrate is presented. The results are applicable to monolithic inductors and transformers, especially when such structures are realized over an epitaxial CMOS substrate. The technique is verified against measured results from 100 MHz to 14 GHz for spiral inductors. Index Terms—CMOS substrate losses, eddy currents, monolithic inductors, monolithic transformers, spiral inductors, spiral transformers. I.

Abstract – Deployment of passive RFID systems or RFID-enhanced sensor networks requires good understanding of the energy scavenging principles. This paper focuses on the energy scavenging design considerations of inductively coupled passive RFID systems. The theoretical estimation of the power by an RF antenna is derived, and the effect of the design parameters on the harvested power is investigated. It is shown that the power delivery performance is largely affected by the tag load at the reader. An adaptive matching circuit at the reader is proposed for achieving optimum power delivery performance when the reader has a variable load. Experimental studies confirm analytical derivations. interrogation periods, and this energy is used to power tag IC. For the maximum reading range, one has to ensure the maximum power transfer efficiency from the reader to the tag. What makes the problem challenging is that in the case of inductively coupled reader-tag, the reader must deal with a changing effective load due to (a) the location-dependent mutual coupling effect between the reader and tag and (b) unpredictable number of tags in the read zone of the reader.

Abstract—This paper presents a physically based compact model for estimating high-frequency performance of spiral inductors. The model accurately accounts for skin and proximity effects in the metal conductors as well as eddy current losses in the substrate. The model shows excellent agreement with measured data mostly within 10 % across a variety of inductor geometries and substrate dopings up to 20 GHz. A web-based spiral inductor synthesis and analysis tool COILS, which makes use of the compact models, is presented. An optimization algorithm using binary searches speeds up the synthesis of inductor designs. Index Terms—Eddy current, ground shield, inductor, patterned ground shield, proximity effect, Q-factor, radio-frequency (RF) integrated circuit, skin effect, spiral inductor. I.

While previous studies on substrate coupling focused mostly on noise induced through drain-bulk capacitance, substrate coupling from planar spiral inductors at radio frequency (RF) via the oxide capacitance has not been reported. This paper presents the experimental and simulation results of substrate noise induced through planar inductors. Experimental and simulation results reveal that isolation between inductor and noise sensor is less than 030 dB at 1 GHz. Separation by distance reduces coupling by less than 2 dB in most practical cases. Practical examples reveal an obstacle in integrating RF tunedgain amplifier with sensitive RF receiver circuits on the same die. Simulation results indicate that hollow inductors have advantages not only in having a higher self-resonant frequency, but also in reducing substrate noise as compared to conventional inductors. The effectiveness of using broken guard ring in reducing inductor induced substrate noise is also examined. Index Terms---Coupling, cross-talk, guard ring, hollow inductor, isolation, RF power amplifier, spiral inductor, substrate noise. I.