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Valor: Efficient, Software-Only Region Conflict Exceptions ∗
"... ns iste nt * Complete * W ell D ocumented*Easyto ..."
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Low-overhead Software Transactional Memory with Progress Guarantees and Strong Semantics
- In Proc. of PPoPP
, 2015
"... on sis te nt * Complete * ..."
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Drinking from Both Glasses: Combining Pessimistic and Optimistic Tracking of Cross-Thread Dependences *
"... Abstract It is notoriously challenging to develop parallel software systems that are both scalable and correct. Runtime support for parallelism-such as multithreaded record & replay, data race detectors, transactional memory, and enforcement of stronger memory models-helps achieve these goals, ..."
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Abstract It is notoriously challenging to develop parallel software systems that are both scalable and correct. Runtime support for parallelism-such as multithreaded record & replay, data race detectors, transactional memory, and enforcement of stronger memory models-helps achieve these goals, but existing commodity solutions slow programs substantially in order to track (i.e., detect or control) an execution's cross-thread dependences accurately. Prior work tracks cross-thread dependences either "pessimistically," slowing every program access, or "optimistically," allowing for lightweight instrumentation of most accesses but dramatically slowing accesses involved in cross-thread dependences. This paper seeks to hybridize pessimistic and optimistic tracking, which is challenging because there exists a fundamental mismatch between pessimistic and optimistic tracking. We address this challenge based on insights about how dependence tracking and program synchronization interact, and introduce a novel approach called hybrid tracking. Hybrid tracking is suitable for building efficient runtime support, which we demonstrate by building hybridtracking-based versions of a dependence recorder and a region serializability enforcer. An adaptive, profile-based policy makes runtime decisions about switching between pessimistic and optimistic tracking. Our evaluation shows that hybrid tracking enables runtime support to overcome the performance limitations of both pessimistic and optimistic tracking alone.
DENOVO: RETHINKING THE MEMORY HIERARCHY FOR DISCIPLINED PARALLELISM
, 2015
"... As multicore systems become widespread, both software and hardware face a major challenge in effi-ciently exploiting and implementing parallelism. While shared-memory remains a popular programming model due to its global address space, it is plagued with undisciplined programming practices that allo ..."
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As multicore systems become widespread, both software and hardware face a major challenge in effi-ciently exploiting and implementing parallelism. While shared-memory remains a popular programming model due to its global address space, it is plagued with undisciplined programming practices that allow implicit communication and unstructured non-determinism. Such “wild ” shared-memory behavior not only makes it difficult to test and maintain software but also complicates hardware, preventing it from scaling in a power-efficient manner. Recent research has proposed replacing the wild shared-memory programming models with a more disciplined approach. The DeNovo project asks the following question: if software is more disciplined, can we build more power-, performance-, and complexity-efficient shared-memory hardware? Focusing on deterministic programs as a discipline to drive DeNovo, we first show that coherence and communication can be made much simpler and more efficient than the current state of the art. The resulting protocol is with-out transient states, invalidation traffic, directory sharer-lists, or false sharing- all significant sources of inefficiencies in existing protocols. Widening the software space further, we then show how DeNovo can support software with disciplined non-determinism without giving up its benefits for deterministic
Toward Efficient Strong Memory Model Support for the Java Platform via Hybrid Synchronization ∗
"... The Java memory model provides strong behavior guarantees for data-race-free executions. However, it provides very weak guaran-tees for racy executions, leading to unexpected, unintuitive behav-iors. This paper focuses on how to provide a memory model, called statically bounded region serializabilit ..."
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The Java memory model provides strong behavior guarantees for data-race-free executions. However, it provides very weak guaran-tees for racy executions, leading to unexpected, unintuitive behav-iors. This paper focuses on how to provide a memory model, called statically bounded region serializability (SBRS), that is substan-tially stronger than the Java memory model. Our prior work intro-duces SBRS, as well as compiler and runtime support for enforcing SBRS called EnfoRSer. EnfoRSer modifies the dynamic compiler to insert instrumentation to acquire a lock on each object accessed by the program. For most programs, EnfoRSer’s primary run-time cost is executing this instrumentation at essentially every memory access. This paper focuses on reducing the run-time overhead of enforc-ing SBRS by avoiding instrumentation at every memory access that
