Abstract — An overview of digital enhancement techniques for analog circuits is presented. Recent research suggests that the high density and low energy of digital circuits can be leveraged to enable a new generation of interface electronics that is based on minimal precision, low complexity analog blocks. Today, examples of enhancement schemes can be found in diverse applications and include nonlinearity compensation of ADCs, predistortion of power amplifiers and mismatch calibration in radio receivers. Since it is often difficult to identify commonalities among these different, but conceptually related schemes, this tutorial paper aims to provide a unified and system-oriented perspective of the field. I.

Abstract—In this paper a novel online calibration technique for high-speed DACs is presented. The approach consists of two elements. The first element is the use of a redundant signed digit (RSD) scheme for the selection of the current sources. This enables a fully digital correction. The second element consists of an adaptive estimation of the correction terms by an LMS algorithm. For this purpose the DAC output signal is low-pass filtered and digitized by an accurate but low-speed calibration ADC. By replicating this analog signal path in the digital domain, the errors can be calculated and used to update the correction weights. The dynamic behavior and the accuracy of the adaptive calibration loop are analyzed both theoretically and through computer simulations, and it is shown that this way a greatly improved accuracy can be obtained. Index Terms—Current steering, digital–analog conversion, digital calibration, LMS, redundant signed digit (RSD) coding.

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A pipelined ADC is presented with 2 fully integrated digital background calibration techniques: harmonic distortion correction (HDC) to compensate for residue amplifier gain error and nonlinearity, and DAC noise cancellation (DNC) to compensate for DAC capacitor mismatches [1,2]. It is the first IC implementation of HDC, and the results demonstrate that HDC and DNC together enable reductions in power dissipation relative to comparable conventional state-of-the-art pipelined ADCs. HDC is one of two recently proposed techniques that digitally measure and cancel ADC errors caused by residue-amplifier distortion to permit higher-distortion and, thus, lower-power residue amplifiers in pipelined ADCs [1,3]. The benefit of HDC relative to the technique of [3] is that it works for any pipelined ADC input signal [1]. It requires an increase in the resolution of the DAC in each pipeline stage to which it is applied, but as described below this is achieved without significantly increasing the area or power dissipation of the ADC.