The use of CMOS nanometer technologies at 65 nm and below will pose serious challenges on the design of mixed-signal integrated systems in the very near future. Rising design complexities, tightening time-to-market constraints, leakage power, increasing technology tolerances, and reducing supply voltages are key challenges that designers face. Novel types of devices, new process materials and new reliability issues are next on the horizon. We discuss new design methodologies and EDA tools that are being or need to be developed to address the problems of designing such mixed-signal integrated systems.

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analog circuit synthesis. It usually consist of two steps: feasibility design space identification and performance macromodels generation. A feasibility design space is defined as a multidimensional space in which every design satisfies all the design constraints. The minimum set of constraints is the one that ensures the correct functionality of the given circuit topology. Performance macromodels are only constructed and thereby valid in the functionally correct design space. Support vector machines (SVMs) are used as classifier to identify the feasible design space of analog circuits. A kernel is an integral part of the SVM and contributes in obtaining an optimized and accurate classifier. The most commonly used kernels are Radial Basis Function (RBF), polynomial, spline, multilayer perceptron. In this paper, some new kernels and some other kernels composed through modifications on the some of the standard kernels, are explored. The classifiers using these kernel functions have been tested on different analog circuits in order to identify the feasible design space. HSPICE has been used for generation of learning data. Least Square SVM toolbox interfaced with MATLAB was used for classification. We found that use of modified kernels improves classification accuracy as well as shortens classifier generation time.

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