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12
BDDbased synthesis of reversible logic for large functions
 in Design Automation Conf., 2009
"... Reversible logic is the basis for several emerging technologies such as quantum computing, optical computing, or DNA computing and has further applications in domains like lowpower design and nanotechnologies. However, current methods for the synthesis of reversible logic are limited, i.e. they a ..."
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Cited by 42 (24 self)
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Reversible logic is the basis for several emerging technologies such as quantum computing, optical computing, or DNA computing and has further applications in domains like lowpower design and nanotechnologies. However, current methods for the synthesis of reversible logic are limited, i.e. they are applicable to relatively small functions only. In this paper, we propose a synthesis approach, that can cope with Boolean functions containing more than a hundred of variables. We present a technique to derive reversible circuits for a function given by a Binary Decision Diagram (BDD). The circuit is obtained using an algorithm with linear worst case behavior regarding runtime and space requirements. Furthermore, the size of the resulting circuit is bounded by the BDD size. This allows to transfer theoretical results known from BDDs to reversible circuits. Experiments show better results (with respect to the circuit cost) and a significantly better scalability in comparison to previous synthesis approaches.
Reversible circuit synthesis using a cyclebased approach
 ACM Journal on Emerging Technologies
, 2010
"... Reversible logic has applications in various research areas including signal processing, cryptography and quantum computation. In this paper, direct NCTbased synthesis of a given kcycle in a cyclebased synthesis scenario is examined. To this end, a set of seven building blocks is proposed that ..."
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Cited by 9 (5 self)
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Reversible logic has applications in various research areas including signal processing, cryptography and quantum computation. In this paper, direct NCTbased synthesis of a given kcycle in a cyclebased synthesis scenario is examined. To this end, a set of seven building blocks is proposed that reveals the potential of direct synthesis of a given permutation to reduce both quantum cost and average runtime. To synthesize a given large cycle, we propose a decomposition algorithm to extract the suggested building blocks from the input specification. Then, a synthesis method is introduced which uses the building blocks and the decomposition algorithm. Finally, a hybrid synthesis framework is suggested which uses the proposed cyclebased synthesis method in conjunction with one of the recent NCTbased synthesis approaches which is based on ReedMuller (RM) spectra. The time complexity and the effectiveness of the proposed synthesis approach are analyzed in detail. Our analyses show that the proposed hybrid framework leads to a better quantum cost in the worstcase scenario compared to the previously presented methods. The proposed framework always converges and typically synthesizes a given specification very fast compared to the available synthesis algorithms. Besides, the quantum costs of benchmark functions are improved about 20 % on average (55% in the best case). 1
Window optimization of reversible and quantum circuits
 in Symposium on Design and Diagnostics of Electronic Circuits and Systems
, 2010
"... Abstract — This paper considers the optimization of reversible and quantum circuits. Both represent the basis for emerging technologies e.g. in the area of quantum computation and low power design. An approach called window optimization is described that does not consider the circuit as a whole, but ..."
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Cited by 6 (4 self)
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Abstract — This paper considers the optimization of reversible and quantum circuits. Both represent the basis for emerging technologies e.g. in the area of quantum computation and low power design. An approach called window optimization is described that does not consider the circuit as a whole, but smaller subcircuits of it (so called windows). Two schemes for extracting the windows and three approaches for their optimization are considered. Application scenarios show that applying the proposed optimizations leads to significant reductions of the circuit cost. I.
A librarybased synthesis methodology for reversible logic
 Microelectron. J
, 2010
"... Synthesis of reversible logic has received significant attention in the recent years and many synthesis approaches for reversible circuits have been proposed so far. In this paper, a librarybased synthesis methodology for reversible circuits is proposed where a reversible specification is consider ..."
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Cited by 3 (2 self)
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Synthesis of reversible logic has received significant attention in the recent years and many synthesis approaches for reversible circuits have been proposed so far. In this paper, a librarybased synthesis methodology for reversible circuits is proposed where a reversible specification is considered as a permutation comprising a set of cycles. To this end, a presynthesis optimization step is introduced to construct a reversible specification from an irreversible function. In addition, a cyclebased representation model is presented to be used as an intermediate format in the proposed synthesis methodology. The selected intermediate format serves as a focal point for all potential representation models. In order to synthesize a given function, a library containing seven building blocks is used where each building block is a cycle of length less than 6. To synthesize large cycles, we also propose a decomposition algorithm which produces all possible minimal and inequivalent factorizations for a given cycle of length greater than 5. All decompositions contain the maximum number of disjoint cycles. The generated decompositions are used in conjunction with a novel cycle assignment algorithm which is proposed based on the graph matching problem to select the best possible cycle pairs. Then, each pair is synthesized by using the available components of the library. The decomposition algorithm together with the cycle assignment method are considered as a binding method which selects a building block from the library for each cycle. Finally, a postsynthesis optimization step is introduced to optimize the synthesis results in terms of different costs. To analyze the proposed methodology, various experiments are performed. Our analyses on the available reversible benchmark functions reveal that the proposed librarybased synthesis methodology can produce lowcost circuits in some cases compared with the current approaches. The proposed methodology always converges and it typically synthesizes a give function fast. No garbage line is used for even permutations. 1 ar
Comparison of the Cost Metrics through Investigation of the Relation between Optimal NCV and Optimal NCT 3qubit Reversible Circuits
, 2006
"... A breadthfirst search method for determining optimal 3qubit circuits composed of quantum NOT, CNOT, controlledV and controlledV + (NCV) gates is introduced. Results are presented for simple gate count and for technology motivated cost metrics. The optimal NCV circuits are also compared to NCV ci ..."
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Cited by 2 (0 self)
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A breadthfirst search method for determining optimal 3qubit circuits composed of quantum NOT, CNOT, controlledV and controlledV + (NCV) gates is introduced. Results are presented for simple gate count and for technology motivated cost metrics. The optimal NCV circuits are also compared to NCV circuits derived from optimal NOT, CNOT and Toffoli (NCT) gate circuits. The work presented here provides basic results and motivation for continued study of the direct synthesis of NCV circuits, and establishes relations between function realizations in different circuit cost metrics. 1
Circuit integration through lattice hyperterms
"... Reducing the size of a logic circuit through lattice identities is an important and wellstudied discrete optimization problem. In this paper, we consider a related problem of integrating several circuits into a single hypercircuit using the recentlydeveloped concept of lattice hyperterms. We give ..."
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Reducing the size of a logic circuit through lattice identities is an important and wellstudied discrete optimization problem. In this paper, we consider a related problem of integrating several circuits into a single hypercircuit using the recentlydeveloped concept of lattice hyperterms. We give a combinatorial algorithm for integrating koutofn symmetrical diagrams which play important role in reliability theory. Our results show that the integration can reduce the number of circuit gates by more than twice.
and
"... Reversible logic is gaining significance in the context of emerging technologies such as quantum computing since reversible circuits do not loose information during computation and there is onetoone mapping between the inputs and outputs. In this work, we present a class of new designs for reversi ..."
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Reversible logic is gaining significance in the context of emerging technologies such as quantum computing since reversible circuits do not loose information during computation and there is onetoone mapping between the inputs and outputs. In this work, we present a class of new designs for reversible binary and BCD adder circuits. The proposed designs are primarily optimized for the number of ancilla inputs and the number of garbage outputs and are designed for possible best values for the quantum cost and delay. In reversible circuits, in addition to the primary inputs, some constant input bits are used to realize different logic functions which are referred to as ancilla inputs and are overheads that need to be reduced. Further, the garbage outputs which do not contribute to any useful computations but are needed to maintain reversibility are also overheads that need to be reduced in reversible designs. First, we propose two new designs for the reversible ripple carry adder: (i) one with no input carry c0 and no ancilla input bits, and (ii) one with input carry c0 and no ancilla input bits. The proposed reversible ripple carry adder designs with no ancilla input bits have less quantum cost and logic depth (delay) compared to their existing counterparts in the literature. In these designs, the quantum cost and delay are reduced by deriving designs based on the reversible Peres gate and the TR gate. Next, four new designs for the reversible BCD adder are presented based on the following two approaches: (i) the addition is performed in binary mode and correction is applied to convert to BCD when required through detection and correction, and (ii) the addition is performed in binary mode and the result is always converted using a binary to BCD converter. The proposed reversible binary and BCD adders can be applied in a wide variety of digital signal processing applications and constitute important design components of reversible computing.
SharedPPRM: A MemoryEfficient Representation for Boolean Reversible Functions
"... A memoryefficient representation scheme, sharedPPRM (SPPRM), for Boolean reversible functions is introduced and analyzed. Compared with conventional PPRM expansion, SPPRM reduces memory usages by using one memory location for many repetitive PPRM subexpressions. To evaluate the effects of data st ..."
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A memoryefficient representation scheme, sharedPPRM (SPPRM), for Boolean reversible functions is introduced and analyzed. Compared with conventional PPRM expansion, SPPRM reduces memory usages by using one memory location for many repetitive PPRM subexpressions. To evaluate the effects of data structure on SPPRM representation, two linked listbased data structures are also examined. The experimental results show the efficiency of the proposed SPPRM representation for both memory usage and CPU time.
Tight Bounds on the Synthesis of 3bit Reversible Circuits: NFT Library
, 2013
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