Results 1  10
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67
An EnergyEfficient Reconfigurable PublicKey Cryptography Processor
 IEEE Journal of SolidState Circuits
, 2001
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Mastrovito Multiplier for All Trinomials
 IEEE Trans. Computers
, 1999
"... An e cient algorithm for the multiplication in GF (2m)was introduced by Mastrovito. The space complexity of the Mastrovito multiplier for the irreducible trinomial x m + x +1was given as m 2, 1 XOR and m 2 AND gates. In this paper, we describe an architecture based on a new formulation of the multip ..."
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Cited by 37 (3 self)
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An e cient algorithm for the multiplication in GF (2m)was introduced by Mastrovito. The space complexity of the Mastrovito multiplier for the irreducible trinomial x m + x +1was given as m 2, 1 XOR and m 2 AND gates. In this paper, we describe an architecture based on a new formulation of the multiplication matrix, and show that the Mastrovito multiplier for the generating trinomial x m + x n +1, where m 6 = 2n, also requires m 2, 1 XOR and m 2 AND gates. However, m 2, m=2 XOR gates are su cient when the generating trinomial is of the form x m + x m=2 +1 for an even m. We also calculate the time complexity of the proposed Mastrovito multiplier, and give design examples for the irreducible trinomials x 7 + x 4 + 1 and x 6 + x 3 +1.
Publickey cryptography for RFIDtags
 In International Workshop on Pervasive Computing and Communication Security – PerSec 2007
, 2007
"... Abstract. RFIDtags are a new generation of barcodes with added functionality. They are becoming very popular tools for identification of products in various applications like e.g. supplychain management. An emerging application is the use of RFIDtags for anticounterfeiting by embedding them int ..."
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Cited by 25 (1 self)
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Abstract. RFIDtags are a new generation of barcodes with added functionality. They are becoming very popular tools for identification of products in various applications like e.g. supplychain management. An emerging application is the use of RFIDtags for anticounterfeiting by embedding them into a product. However, there is a risk related to naively using those tags for several applications. In particular, if no appropriate cryptographic measures are taken, the privacy of a user carrying tagged items can be severely damaged. In order to enable these applications and at the same time minimize the risks, publickey cryptography (PKC) offers attractive solutions. Whether a publickey cryptosystem can be implemented on an RFID tag or not remains an open problem. In this paper, we focus on the problem of anticounterfeiting measures that can be provided by RFIDtags. More precisely, we investigate which PKCbased identification protocols are useful for this application. We discuss the feasibility of identification protocols based on Elliptic Curve Cryptography (ECC) and show that it is feasible on RFID tags.
Fast arithmetic for publickey algorithms in Galois fields with composite exponents
 IEEE Transactions on Computers
, 1999
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A generalized method for constructing subquadratic complexity GF(2 k ) multipliers
 IEEE Transactions on Computers
, 2004
"... We introduce a generalized method for constructing subquadratic complexity multipliers for even characteristic field extensions. The construction is obtained by recursively extending short convolution algorithms and nesting them. To obtain the short convolution algorithms the Winograd short convolu ..."
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Cited by 22 (0 self)
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We introduce a generalized method for constructing subquadratic complexity multipliers for even characteristic field extensions. The construction is obtained by recursively extending short convolution algorithms and nesting them. To obtain the short convolution algorithms the Winograd short convolution algorithm is reintroduced and analyzed in the context of polynomial multiplication. We present a recursive construction technique that extends any d point multiplier into an n = d k point multiplier with area that is subquadratic and delay that is logarithmic in the bitlength n. We present a thorough analysis that establishes the exact space and time complexities of these multipliers. Using the recursive construction method we obtain six new constructions, among which one turns out to be identical to the Karatsuba multiplier. All six algorithms have subquadratic space complexities and two of the algorithms have significantly better time complexities than the Karatsuba algorithm. Keywords: Bitparallel multipliers, finite fields, Winograd convolution 1
Mastrovito multiplier for general irreducible polynomials
 IEEE Transactions on Computers
, 2000
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Elliptic curve cryptosystems on reconfigurable hardware
 MASTER’S THESIS, WORCESTER POLYTECHNIC INST
, 1998
"... Security issues will play an important role in the majority of communication and computer networks of the future. As the Internet becomes more and more accessible to the public, security measures will have to be strengthened. Elliptic curve cryptosystems allow for shorter operand lengths than other ..."
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Cited by 19 (0 self)
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Security issues will play an important role in the majority of communication and computer networks of the future. As the Internet becomes more and more accessible to the public, security measures will have to be strengthened. Elliptic curve cryptosystems allow for shorter operand lengths than other publickey schemes based on the discrete logarithm in finite fields and the integer factorization problem and are thus attractive for many applications. This thesis describes an implementation of a crypto engine based on elliptic curves. The underlying algebraic structures are composite Galois fields GF((2 n) m) in a standard base representation. As a major new feature, the system is developed for a reconfigurable platform based on Field Programmable Gate Arrays (FPGAs). FPGAs combine the flexibility of software solutions with the security of traditional hardware implementations. In particular, it is possible to easily change all algorithm parameters such as curve coefficients, field order, or field representation. The thesis deals with the design and implementation of elliptic curve point multiplicationarchitectures. The architectures are described in VHDL and mapped to Xilinx FPGA devices. Architectures over Galois fields of different order and representation were implemented and compared. Area and timing measurements are provided for all architectures. It is shown that a full point multiplication on elliptic curves of realworld size can be implemented on commercially available FPGAs.
Low Complexity Bit Parallel Architectures for Polynomial Basis Multiplication over GF(2 m
 IEEE Transactions on Computers
, 2004
"... Abstract—Representing the field elements with respect to the polynomial (or standard) basis, we consider bit parallel architectures for multiplication over the finite field GFð2 m Þ. In this effect, first we derive a new formulation for polynomial basis multiplication in terms of the reduction matri ..."
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Cited by 18 (2 self)
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Abstract—Representing the field elements with respect to the polynomial (or standard) basis, we consider bit parallel architectures for multiplication over the finite field GFð2 m Þ. In this effect, first we derive a new formulation for polynomial basis multiplication in terms of the reduction matrix Q. The main advantage of this new formulation is that it can be used with any field defining irreducible polynomial. Using this formulation, we then develop a generalized architecture for the multiplier and analyze the time and gate complexities of the proposed multiplier as a function of degree m and the reduction matrix Q. To the best of our knowledge, this is the first time that these complexities are given in terms of Q. Unlike most other articles on bit parallel finite field multipliers, here we also consider the number of signals to be routed in hardware implementation and we show that, compared to the wellknown Mastrovito’s multiplier, the proposed architecture has fewer routed signals. In this article, the proposed generalized architecture is further optimized for three special types of polynomials, namely, equally spaced polynomials, trinomials, and pentanomials. We have obtained explicit formulas and complexities of the multipliers for these three special irreducible polynomials. This makes it very easy for a designer to implement the proposed multipliers using hardware description languages like VHDL and Verilog with minimum knowledge of finite field arithmetic. Index Terms—Finite or Galois field, Mastrovito multiplier, allone polynomial, polynomial basis, trinomial, pentanomial and equallyspaced polynomial. 1
Parallel Multipliers Based on Special Irreducible Pentanomials
 IEEE Trans on Computers
, 2003
"... Abstract—The stateoftheart Galois field GFð2 m Þ multipliers offer advantageous space and time complexities when the field is generated by some special irreducible polynomial. To date, the best complexity results have been obtained when the irreducible polynomial is either a trinomial or an equal ..."
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Cited by 17 (0 self)
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Abstract—The stateoftheart Galois field GFð2 m Þ multipliers offer advantageous space and time complexities when the field is generated by some special irreducible polynomial. To date, the best complexity results have been obtained when the irreducible polynomial is either a trinomial or an equally spaced polynomial (ESP). Unfortunately, there exist only a few irreducible ESPs in the range of interest for most of the applications, e.g., errorcorrecting codes, computer algebra, and elliptic curve cryptography. Furthermore, it is not always possible to find an irreducible trinomial of degree m in this range. For those cases where neither an irreducible trinomial nor an irreducible ESP exists, the use of irreducible pentanomials has been suggested. Irreducible pentanomials are abundant, and there are several eligible candidates for a given m. In this paper, we promote the use of two special types of irreducible pentanomials. We propose new Mastrovito and dual basis multiplier architectures based on these special irreducible pentanomials and give rigorous analyses of their space and time complexity. Index Terms—Finite fields arithmetic, parallel multipliers, pentanomials, multipliers for GFð2 m Þ. æ
An Elliptic Curve Processor Suitable For RFIDTags
, 2006
"... RFIDTags are small devices used for identification purposes in many applications nowadays. ..."
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Cited by 17 (1 self)
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RFIDTags are small devices used for identification purposes in many applications nowadays.