Results 1 -
3 of
3
Affine nested loop programs and their binary cyclo-static dataflow counterparts
- In Proc. of the Intl. Conf. on Application Specific Systems, Architectures, and Processors, Steamboat
, 2006
"... Parameterized static affine nested loop programs can be automatically converted to input-output equivalent Kahn Process Network specifications. These networks turn out to be close relatives of parameterized cyclo-static dataflow graphs. Token production and consumption can be cyclic with a finite nu ..."
Abstract
-
Cited by 9 (4 self)
- Add to MetaCart
Parameterized static affine nested loop programs can be automatically converted to input-output equivalent Kahn Process Network specifications. These networks turn out to be close relatives of parameterized cyclo-static dataflow graphs. Token production and consumption can be cyclic with a finite number of cycles or finite non-cyclic. Moreover the token production and consumption sequences are binary. 1.
The Artemis Workbench for System-Level Performance Evaluation of Embedded Systems
- Int’l J. Embedded Systems
"... Abstract: In this paper, we present an overview of the Artemis workbench, which provides modelling and simulation methods and tools for efficient performance evaluation and exploration of heterogeneous embedded multimedia systems. More specifically, we describe the Artemis system-level modelling met ..."
Abstract
-
Cited by 8 (2 self)
- Add to MetaCart
Abstract: In this paper, we present an overview of the Artemis workbench, which provides modelling and simulation methods and tools for efficient performance evaluation and exploration of heterogeneous embedded multimedia systems. More specifically, we describe the Artemis system-level modelling methodology, including its support for gradual refinement of architecture performance models as well as for calibration of the system-level models. We show that this methodology allows for architectural exploration at different levels of abstraction while maintaining high-level and architecture independent application specifications. Moreover, we illustrate these modelling aspects using a case study with a Motion-JPEG application.
MODEL-BASED HARDWARE DESIGN FOR IMAGE PROCESSING SYSTEMS
, 2006
"... Model-based design has been touted as the most viable design methodology of the future for the design of embedded hardware/software systems. Due to the large complex-ity of modern embedded systems, it is more and more error-prone to design systems with-out having a formal model to support and verify ..."
Abstract
- Add to MetaCart
Model-based design has been touted as the most viable design methodology of the future for the design of embedded hardware/software systems. Due to the large complex-ity of modern embedded systems, it is more and more error-prone to design systems with-out having a formal model to support and verify the application at design time. Also, formal models generally capture broad classes of applications, and thus any innovation on a modeling technique has the potential to enhance every individual application in the asso-ciated class. Often, a formal model captures the high-level abstraction of an application, which is lost in the final implementation, and thus modeling gives an effective platform to perform high-level design optimizations. Dataflow graphs have been widely used as for-mal models in the signal processing domain for a long time, and various commercial tools have adopted dataflow semantics for model-based design methodology. In this thesis, we develop a new dataflow meta-modeling technique, called homoge-neous parameterized dataflow (HPDF). HPDF is a meta-modeling technique in that it can be applied to a variety of underlying dataflow models of computation to enhance their expressive power, while maintaining much of the useful structure of the underlying mod-

