Results 1 - 10
of
30
An interior-point method for large-scale l1-regularized logistic regression
- Journal of Machine Learning Research
, 2007
"... Logistic regression with ℓ1 regularization has been proposed as a promising method for feature selection in classification problems. In this paper we describe an efficient interior-point method for solving large-scale ℓ1-regularized logistic regression problems. Small problems with up to a thousand ..."
Abstract
-
Cited by 77 (3 self)
- Add to MetaCart
Logistic regression with ℓ1 regularization has been proposed as a promising method for feature selection in classification problems. In this paper we describe an efficient interior-point method for solving large-scale ℓ1-regularized logistic regression problems. Small problems with up to a thousand or so features and examples can be solved in seconds on a PC; medium sized problems, with tens of thousands of features and examples, can be solved in tens of seconds (assuming some sparsity in the data). A variation on the basic method, that uses a preconditioned conjugate gradient method to compute the search step, can solve very large problems, with a million features and examples (e.g., the 20 Newsgroups data set), in a few minutes, on a PC. Using warm-start techniques, a good approximation of the entire regularization path can be computed much more efficiently than by solving a family of problems independently.
Power control by geometric programming
- IEEE Trans. on Wireless Commun
, 2005
"... Abstract — In wireless cellular or ad hoc networks where Quality of Service (QoS) is interference-limited, a variety of power control problems can be formulated as nonlinear optimization with a system-wide objective, e.g., maximizing the total system throughput or the worst user throughput, subject ..."
Abstract
-
Cited by 17 (3 self)
- Add to MetaCart
Abstract — In wireless cellular or ad hoc networks where Quality of Service (QoS) is interference-limited, a variety of power control problems can be formulated as nonlinear optimization with a system-wide objective, e.g., maximizing the total system throughput or the worst user throughput, subject to QoS constraints from individual users, e.g., on data rate, delay, and outage probability. We show that in the high Signal-to-Interference Ratios (SIR) regime, these nonlinear and apparently difficult, nonconvex optimization problems can be transformed into convex optimization problems in the form of geometric programming; hence they can be very efficiently solved for global optimality even with a large number of users. In the medium to low SIR regime, some of these constrained nonlinear optimization of power control cannot be turned into tractable convex formulations, but a heuristic can be used to compute in most cases the optimal solution by solving a series of geometric programs through the approach of successive convex approximation. While efficient and robust algorithms have been extensively studied for centralized solutions of geometric programs, distributed algorithms have not been explored before. We present a systematic method of distributed algorithms for power control that is geometric-programming-based. These techniques for power control, together with their implications to admission control and pricing in wireless networks, are illustrated through several numerical examples. Index Terms — Convex optimization, CDMA power control, Distributed algorithms. I.
A new method for design of robust digital circuits
- Proceedings International Symposium on Quality Electronic Design (ISQED
, 2005
"... As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional circuit optimization methods assuming deterministic gate delays produce a flat “wall ” of equally critical paths, resulting ..."
Abstract
-
Cited by 10 (1 self)
- Add to MetaCart
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional circuit optimization methods assuming deterministic gate delays produce a flat “wall ” of equally critical paths, resulting in variation-sensitive designs. This paper describes a new method for sizing of digital circuits, with uncertain gate delays, to minimize their performance variation leading to a higher parametric yield. The method is based on adding margins on each gate delay to account for variations and using a new “soft maximum ” function to combine path delays at converging nodes. PSfrag Using replacements analytic models to predict the means and standard deterministic deviations method of gate delays as posynomial functions of the device sizes, PDF we create a simple, computationally efficient heuristic for uncertainty-aware sizing of digital circuits via Geometric Programming. Monte-Carlo simulations on custom 32bit adders and ISCAS’85 benchmarks show that about 10 % to 20 % delay reduction over deterministic sizing methods can be achieved, without any additional cost in area. 1.
Adaptation, Coordination and Distributed Resource Allocation in Interference-Limited Wireless Networks
"... A sensible design of wireless networks involves striking a good balance between an aggressive reuse of the spectral resource throughout the network and managing the resulting co-channel interference. Traditionally this problem has been tackled using a “divide and conquer” approach. The latter consis ..."
Abstract
-
Cited by 4 (1 self)
- Add to MetaCart
A sensible design of wireless networks involves striking a good balance between an aggressive reuse of the spectral resource throughout the network and managing the resulting co-channel interference. Traditionally this problem has been tackled using a “divide and conquer” approach. The latter consists in deploying the network with a static or semi-dynamic pattern of resource reutilization. The chosen reuse factor, while sacrificing a substantial amount of efficiency, brings the interference to a tolerable level. The resource can then be managed in each cell so as to optimize the per cell capacity using an advanced air interface design. In this paper we focus our attention on the overall network capacity as a measure of system performance. We consider the problem of resource allocation and adaptive transmission in multicell scenarios. As a key instance, the problem of joint scheduling and power control simultaneously in multiple transmit-receive links, which employ capacity-achieving adaptive codes, is studied. In principle, the solution of such an optimization hinges on tough issues such as the computational complexity and the requirement for heavy receiver-to-transmitter feedback and, for cellular networks, cell-to-cell channel state information (CSI) signaling. We give asymptotic properties pertaining to rate-maximizing power control and scheduling in multicell networks. We then present some promising leads for substantial complexity and signaling reduction via the use of newly developed distributed and game theoretic techniques.
Frequency allocation, transmit power control, and load balancing with site specific knowledge for optimizing wireless network performance
, 2007
"... ..."
An Efficient Method for Large-Scale Gate Sizing
- IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications
"... Abstract—We consider the problem of choosing the gate sizes or scale factors in a combinational logic circuit in order to minimize the total area, subject to simple RC timing constraints, and a minimum-allowed gate size. This problem is well known to be a geometric program (GP), and can be solved by ..."
Abstract
-
Cited by 3 (1 self)
- Add to MetaCart
Abstract—We consider the problem of choosing the gate sizes or scale factors in a combinational logic circuit in order to minimize the total area, subject to simple RC timing constraints, and a minimum-allowed gate size. This problem is well known to be a geometric program (GP), and can be solved by using standard interiorpoint methods for small- and medium-size problems with up to several thousand gates. In this paper, we describe a new method for solving this problem that handles far larger circuits, up to a million gates, and is far faster. Numerical experiments show that our method can compute an adequately accurate solution within around 200 iterations; each iteration, in turn, consists of a few passes over the circuit. In particular, the complexity of our method, with a fixed number of iterations, is linear in the number of gates. A simple implementation of our algorithm can size a 10 000 gate circuit in 25 s, a 100 000 gate circuit in 4 min, and a million gate circuit in 40 min, approximately. For the million gate circuit, the associated GP has three million variables and more than six million monomial terms in its constraints; as far as we know, these are the largest GPs ever solved. Index Terms—Gate sizing, geometric programming (GP), largescale optimization. I.
Optimal doping profiles via geometric programming
- IEEE Transactions on Electron Devices
, 2005
"... Abstract—We first consider the problem of determining the doping profile that minimizes base transit time in a (homojunction) bipolar junction transistor. We show that this problem can be formulated as a geometric program, a special type of optimization problem that can be transformed to a convex op ..."
Abstract
-
Cited by 2 (1 self)
- Add to MetaCart
Abstract—We first consider the problem of determining the doping profile that minimizes base transit time in a (homojunction) bipolar junction transistor. We show that this problem can be formulated as a geometric program, a special type of optimization problem that can be transformed to a convex optimization problem, and therefore solved (globally) very efficiently. We then consider several extensions to the basic problem, such as accounting for velocity saturation, and adding constraints on doping gradient, current gain, base resistance, and breakdown voltage. We show that a similar approach can be used to maximize the cutoff frequency, taking into account junction capacitances and forward transit time. Finally, we show that the method extends to the case of heterojunction bipolar junction transistors, in which the doping profile, as well as the profile of the secondary semiconductor, are to be jointly optimized. Index Terms—Base doping profile, base transit time minimization, cutoff frequency maximization, geometric programming, Ge-profile optimization, optimal doping profile. I.
Orthogonal polynomials associated with root systems,Preprint(1988
- the IEEE Journal on Selected Areas in Communications
, 2006
"... Recent research in wireless CDMA systems has shown that adaptive rate/power control can considerably increase network throughput relative to systems that use only power or rate control. In this paper, we consider joint power/rate optimization in the context of orthogonal modulation (OM) and investig ..."
Abstract
-
Cited by 1 (0 self)
- Add to MetaCart
Recent research in wireless CDMA systems has shown that adaptive rate/power control can considerably increase network throughput relative to systems that use only power or rate control. In this paper, we consider joint power/rate optimization in the context of orthogonal modulation (OM) and investigate the additional performance gains achieved through adaptation of the OM order. We show that such adaptation can significantly increase network throughput while simultaneously reducing the per-bit energy consumption relative to fixed-order modulation systems. The optimization is carried out under two different objective functions: minimizing the maximum service time and maximizing the sum of user rates. For the first objective function, we prove that the optimization problem can be formulated as a generalized geometric program (GGP). We then show how this GGP can be transformed into a nonlinear convex program, which can be solved optimally and efficiently. For the second objective function, we obtain a lower bound on the performance gain of adaptive OM (AOM) over fixed-modulation systems. Numerical results indicate that relative to an optimal joint rate/power control fixed-order modulation scheme, the proposed AOM scheme achieves significant throughput and energy gains. I.
Design of posynomial models for mosfets: Symbolic regression using genetic algorithms
- Genetic Programming: Theory and Practice IV
, 2006
"... Summary. Starting from a broad description of analog circuit design in terms of topology design and sizing, we discuss the difficulties of sizing and describe approaches that are manual or automatic. These approaches make use of blackbox optimization techniques such as evolutionary algorithms or con ..."
Abstract
-
Cited by 1 (1 self)
- Add to MetaCart
Summary. Starting from a broad description of analog circuit design in terms of topology design and sizing, we discuss the difficulties of sizing and describe approaches that are manual or automatic. These approaches make use of blackbox optimization techniques such as evolutionary algorithms or convex optimization techniques such as geometric programming. Geometric programming requires posynomial expressions for a circuit’s performance measurements. We show how a genetic algorithm can be exploited to evolve a posynomial expression (i.e. model) of transistor (i.e. mosfet) behavior more accurately than statistical techniques in the literature. 1

