: In this paper, we develop a common cellular neural network framework for various adaptive nonlinear filters based on robust statistic and geometry-driven diffusion paradigms. The base models of both approaches are defined as difference-controlled nonlinear CNN templates while the self-adjusting property is ensured by simple analogic (analog and logic) CNN algorithms. Two adaptive strategies are shown for the order statistic class. When applied to the images distorted by impulse noise both give more visually pleasing results with lower frequency weighted mean square error than the median base model. Generalizing a variational approach we derive the constrained anisotropic diffusion, where the output of the geometry-driven diffusion model is forced to stay close to a pre-defined morphological constraint. We propose a coarse-grid CNN approach that is capable of calculating an acceptable noise-level estimate (proportional to the variance of the Gaussian noise) and controlling t...

In this paper, we present an analytical design approach for the class of bipolar cellular neural networks (CNN's) which yields optimally robust template parameters. We give a rigorous definition of absolute and relative robustness and show that all well-defined CNN tasks are characterized by a finite set of linear and homogeneous inequalities. This system of inequalities can be analytically solved for the most robust template by simple matrix algebra. For the relative robustness of a task, a theoretical upper bound exists and is easily derived, whereas the absolute robustness can be arbitrarily increased by template scaling. A series of examples demonstrates the simplicity and broad applicability of the proposed method.

this paper (see Theory section) can be restated in the CNN framework [25] as well. The model has to be altered to the hardwarefriendly full-range model [26] using nonlinear feedback templates. Nevertheless the CNN framework is defined on a discrete grid and therefore limited in its applications. Various CMOS VLSI implementations of CNNs have been reported [27]. They can be discriminated by fixed [28] or variable [29, 30] templates, current [26] or voltage mode [31], full [32] or limited [33] CNN-model, on-chip [34] or o#-chip sensors. They are referenced here in detail as a starting point for further investigations in the field of analog VLSI systems for signal processing.

Abstract—We report on the design and characterization of an ultralow-power converter, designed for use in baseband digitization in wireless sensor network radio receivers. The converter uses a successive approximation architecture and operates robustly with a supply voltage as low as 450 mV, overcoming charge leakage limitations. Implemented in a 90 nm CMOS process, this design achieves a figure of merit of 0.14 pJ/Conv.Step for the converter core and shows the integration of a complete data-conversion subsystem, including reference generation, from a 0.5 V supply. Index Terms—Analog-to-digital conversion, charge leakage, CMOS, digital calibration, low power, low voltage, subthreshold, successive approximation.

This thesis deals with the realization of hardware that is capable of computing algo-rithms that can be described using the theory of polynomial cellular neural/nonlinear networks (CNNs). The goal is to meet the requirements of an algorithm for predict-ing the onset of an epileptic seizure. The analysis associated with this application requires extensive computation of data that consists of segments of brain electrical activity. Different types of computer architectures are overviewed. Since the algo-rithm requires operations in which data is manipulated locally, special emphasis is put on assessing different parallel architectures. An array computer is potentially able to perform local computational tasks effectively and rapidly. Based on the requirements of the algorithm, a mixed-mode CNN is proposed. A mixed-mode CNN combines analog and digital processing so that the couplings and the polynomial terms are implemented with analog blocks, whereas the integrator is digital. A/D and D/A converters are used to interface between the analog blocks and the integrator. Based on the mixed-mode CNN architecture a cellular array proces-

Programmable Artificial Retina (PAR) means lodging a digital Processing Element in each pixel of a focal plane array. A PAR is faced with constraints coming from the meeting of both optical sensor and processor domain. Image sensing is sensitive to device temperature. Then heat dissipation should be limited. High resolution sensor implies large chip and small pixel area. Combining these characteristics with the power hungry nature of the vision processing task ends the equation to consider. Large array means many processors and potentially power consumption without the usual possibility of trading power against silicon area, due to extreme geometrical constraints. The considerations therein are based on experimenting our last PAR chip fabricated in standard 0.8m CMOS technology, called PVLSAR2.2 1 , which features a resolution of 128 \Theta 128 pixels and among others, the ability to operate both under and above threshold voltage. Power considerations are tackled at three levels: pow...

A CMOS image processing sensor for the detection of image features

A CMOS image processing sensor for the detection of image features

Abstract not found