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A lowvoltage CMOS Op Amp with a railtorail constantgm input stage and a class AB rail torail output stage
 IEEE proc. ISCAS
, 1993
"... presented. The O p Amp features railtorail operation and has an ..."
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presented. The O p Amp features railtorail operation and has an
A 1V 10MHz clockrate 13bit CMOS 16 modulator using unitygainreset opamps
 IEEE J. SolidState Circuits
, 2002
"... Abstract—The problem of lowvoltage operation of switchedcapacitor circuits is discussed, and several solutions based on using unitygainreset of the opamps are proposed. Due to the feedback structure, the opamps do not need to be switched off during the reset phase of the operation, and hence can ..."
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Abstract—The problem of lowvoltage operation of switchedcapacitor circuits is discussed, and several solutions based on using unitygainreset of the opamps are proposed. Due to the feedback structure, the opamps do not need to be switched off during the reset phase of the operation, and hence can be clocked at a high rate. A lowvoltage 16 modulator, incorporating pseudodifferential unitygainreset opamps, is described. A test chip, realized in a 0.35 m CMOS process and clocked at 10.24 MHz, provided a dynamic range of 80 dB and a signaltonoise C distortion (SNDR) ratio of 78 dB for a 20kHz signal bandwidth, and a dynamic range of 74 dB and SNDR of 70 dB for a 50kHz bandwidth, with a 1V supply voltage. Index Terms—ADC, chargepump circuits, delta–sigma, low voltage, sigma–delta, switchedcapacitor circuits, switched opamp. I.
A CMOS LowDistortion Fully Differential Power Amplifier with Double Nested Miller Compensation
 IEEE J. SolidState Circuits
, 1993
"... ..."
Transactions Briefs A Hybrid Radix4/Radix8 Low Power Signed Multiplier Architecture
"... Abstract—A hybrid radix4/radix8 architecture targeted for high bit, general purpose, digital multipliers is presented as a compromise between the high speed of a radix4 multiplier architecture and the low power dissipation of a radix8 multiplier architecture. In this hybrid radix4/radix8 multi ..."
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Abstract—A hybrid radix4/radix8 architecture targeted for high bit, general purpose, digital multipliers is presented as a compromise between the high speed of a radix4 multiplier architecture and the low power dissipation of a radix8 multiplier architecture. In this hybrid radix4/radix8 multiplier architecture, the performance bottleneck of a radix8 multiplier, the generation of three times the multiplicand for use in generating the radix8 partial product, is performed in parallel with the reduction of the radix4 partial products rather than serially, as in a radix8 multiplier. This hybrid radix4/radix8 multiplier architecture requires 13 % less power for a 64 2 64b multiplier, and results in only a 9 % increase in delay, as compared with a radix4 implementation. When the voltage supply is scaled to equalize delay, the 64 2 64b hybrid multiplier dissipates less power than either the radix4 or radix8 multipliers. The hybrid radix4/radix8 architecture is therefore appropriate for those applications that must dissipate minimal power while operating at high speeds. Index Terms—Low power, multiplier, radix. I.
GeneralPurpose 3V CMOS Operational Amplifier with a New
, 1997
"... Design tradeoffs for a lowvoltage twostage amplifier in the HP CMOS14 process are presented and some of the issues of lowvoltage analog design are discussed. The design of a new constanttransconductance input stage that has a railtorail commonmode input range is described, along with the rai ..."
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Design tradeoffs for a lowvoltage twostage amplifier in the HP CMOS14 process are presented and some of the issues of lowvoltage analog design are discussed. The design of a new constanttransconductance input stage that has a railtorail commonmode input range is described, along with the railtorail classAB output stage. The performance specifications and area of this amplifier are compared with a similar design in a previous process, CMOS34. by Derek L. Knee and Charles E. Moore Experience gained over the last few years within the design centers of the HP Integrated Circuit Business Division (ICBD) has shown that a generalpurpose operational amplifier is a fundamental building block for many mixedsignal integrated circuits. These generalpurpose operational amplifiers are typically used in support functions and not in the highfrequency differential signal paths. With the recent process release of AMOS14TB, the analog version of the HP CMOS14TB IC process, the logical step was to design a generalpurpose operational amplifier for use with mixed analog/digital chips using AMOS14TB. However, from