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Efficient Automatic STE Refinement Using Responsibility
"... Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on 3valued symbolic simulation, using 0,1, and X (“unknown”). X is used to abstract away values of circuit nodes, thus reducing memory and runtime of STE runs. The abstraction is derived ..."
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Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on 3valued symbolic simulation, using 0,1, and X (“unknown”). X is used to abstract away values of circuit nodes, thus reducing memory and runtime of STE runs. The abstraction is derived from a given user specification. An STE run results in “pass ” (1), if the circuit satisfies the specification, “fail ” (0) if the circuit falsifies it, and “unknown ” (X), if the abstraction is too coarse to determine either of the two. In the latter case, refinement is needed: The X values of some of the abstracted inputs should be replaced. The main difficulty is to choose an appropriate subset of these inputs that will help to eliminate the “unknown” STE result, while avoiding an unnecessary increase in memory and runtime. The common approach to this problem is to manually choose these inputs. This work suggests a novel approach to automatic refinement for STE, which is based on the notion of responsibility. For each input with X value we compute its Degree of Responsibility (DoR) to the “unknown ” STE result. We then refine those inputs whose DoR is maximal. We implemented an efficient algorithm, which is linear in the size of the circuit, for computing the approximate DoR of inputs. We used it for refinements for STE on several circuits and specifications. Our experimental results show that DoR is a very useful device for choosing inputs for refinement. In comparison with previous works on automatic refinement, our computation of the refinement set is faster, STE needs fewer refinement iterations and uses less overall memory and time. 1
2Valued and 3Valued AbstractionRefinement in Model Checking
"... This paper presents two frameworks for abstractionrefinement in model checking. The first is the CounterExampleGuided AbstractionRefinement (CEGAR) which can verify universal fragments of temporal logics and is based on a 2valued semantics of temporal logics. The other is the Threevalued Abstra ..."
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This paper presents two frameworks for abstractionrefinement in model checking. The first is the CounterExampleGuided AbstractionRefinement (CEGAR) which can verify universal fragments of temporal logics and is based on a 2valued semantics of temporal logics. The other is the Threevalued AbstractionRefinement (TVAR) and is based on a 3valued semantics of these logics. We also present an application of the 3valued framework for fully automatic compositional model checking. Based on this and other successful applications of the 3valued framework we conclude that the additional power it provides is worth the extra efforts of having nonstandard definitions and algorithms. Keywords. Model checking, abstraction, 3valued abstraction, refinement, CEGAR,
3Valued Circuit SAT for STE with Automatic Refinement
"... Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on a 3valued symbolic simulation, using 0,1 and X (”unknown”), where the X is used to abstract away values of the circuit nodes. Most STE tools are BDDbased and use a dual rail represent ..."
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Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on a 3valued symbolic simulation, using 0,1 and X (”unknown”), where the X is used to abstract away values of the circuit nodes. Most STE tools are BDDbased and use a dual rail representation for the three possible values of circuit nodes. SATbased STE tools typically use two variables for each circuit node, to comply with the dual rail representation. In this work we present a novel 3valued Circuit SATbased algorithm for STE. The STE problem is translated into a Circuit SAT instance. A solution for this instance implies a contradiction between the circuit and the STE assertion. An unSAT instance implies either that the assertion holds, or that the model is too abstract to be verified. In case of a too abstract model, we propose a refinement automatically. We implemented our 3Valued Circuit SATbased STE algorithm and applied it successfully to several STE examples. 1
Symbolic Trajectory Evaluation (STE): Automatic Refinement and Vacuity Detection
"... Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on combining 3valued abstraction with symbolic simulation, using 0,1 and ("unknown"). The value is used to abstract away parts of the circuit. The abstraction is derived from the user’s s ..."
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Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on combining 3valued abstraction with symbolic simulation, using 0,1 and ("unknown"). The value is used to abstract away parts of the circuit. The abstraction is derived from the user’s specification. Currently the process of refinement in STE is performed manually. This paper presents an automatic refinement technique for STE. The technique is based on a clever selection of constraints that are added to the specification so that on the one hand the semantics of the original specification is preserved, and on the other hand, the part of the state space in which the "unknown " result is received is significantly decreased or totally eliminated. In addition, this paper raises the problem of vacuity of passed and failed specifications. This problem was never discussed in the framework of STE. We describe when an STE specification may vacuously pass or fail, and propose a method for vacuity detection in STE.