Abstract—This brief presents a new simultaneous multislope analog–digital converter (ADC) architecture suitable for array implementations in, e.g., CMOS image sensors (CISs). The simplest implementation is almost twice as fast as a conventional-slope ADC, while it requires only a small amount of extra circuitry. Measurements have been performed on a custom made CIS which implements parts of the proposed ADC. The measurements show good linearity and verify the concept of the new architecture. Index Terms—Analog–digital converter (ADC), analog–digital (A/D) conversion, CMOS image sensors (CISs), simultaneous multislope (SMS), single slope. I.

Abstract—This paper presents a multiresolution general-purpose high-speed machine vision sensor with on-chip image processing capabilities. The sensor comprises an innovative multiresolution sensing area, 1536 A/D converters, and a SIMD array of 1536 bit-serial processors with corresponding memory. The sensing area consists of an area part with 1536 512 pixels, and a line-scan part with a set of rows with 3072 pixels each. The SIMD processor array can deliver more than 100 GOPS sustained and the on-chip pixel-analysing rate can be as high as 4 Gpixels/s. The sensor is ideal for high-speed multisense imaging where, e.g., color, greyscale, internal material light scatter, and 3-D profiles are captured simultaneously. When running only 3-D laser triangulation, a data rate of more than 20 000 profiles/s can be achieved when delivering 1536 range values per profile with 8 bits of range resolution. Experimental results showing very good image characteristics and a good digital to analog noise isolation are presented. Index Terms—APS, CMOS image sensors, laser triangulation, machine vision, MAPP, multiresolution, multisense, smart vision sensors, 3-D.