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Software Verification with Integrated Data Type Refinement for Integer Arithmetic
, 2004
"... We present an approach to integrating the refinement relation between infinite integer types (used in specification languages) and finite integer types (used in programming languages) into software verification calculi. Since integer types in programming languages have finite ranges, in general they ..."
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Cited by 16 (3 self)
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We present an approach to integrating the refinement relation between infinite integer types (used in specification languages) and finite integer types (used in programming languages) into software verification calculi. Since integer types in programming languages have finite ranges, in general they are not a correct data refinement of the mathematical integers usually used in specification languages. Ensuring the correctness of such a refinement requires generating and verifying additional proof obligations. We tackle this problem considering Java and UML/OCL as example. We present a sequent calculus for Java integer arithmetic with integrated generation of refinement proof obligations. Thus, there is no explicit...
Formal verification of square root algorithms
 Formal Methods in Systems Design
, 2003
"... Abstract. We discuss the formal verification of some lowlevel mathematical software for the Intel ® Itanium ® architecture. A number of important algorithms have been proven correct using the HOL Light theorem prover. After briefly surveying some of our formal verification work, we discuss in more ..."
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Cited by 9 (1 self)
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Abstract. We discuss the formal verification of some lowlevel mathematical software for the Intel ® Itanium ® architecture. A number of important algorithms have been proven correct using the HOL Light theorem prover. After briefly surveying some of our formal verification work, we discuss in more detail the verification of a square root algorithm, which helps to illustrate why some features of HOL Light, in particular programmability, make it especially suitable for these applications. 1. Overview The Intel ® Itanium ® architecture is a new 64bit architecture jointly developed by Intel and HewlettPackard, implemented in the Itanium® processor family (IPF). Among the software supplied by Intel to support IPF processors are some optimized mathematical functions to supplement or replace less efficient generic libraries. Naturally, the correctness of the algorithms used in such software is always a major concern. This is particularly so for division, square root and certain transcendental function kernels, which are intimately tied to the basic architecture. First, in IA32 compatibility mode, these algorithms are used by hardware instructions like fptan and fdiv. And while in “native ” mode, division and square root are implemented in software, typical users are likely to see them as part of the basic architecture. The formal verification of some of the division algorithms is described by Harrison (2000b), and a representative verification of a transcendental function by Harrison (2000a). In this paper we complete the picture by considering a square root algorithm. Division, transcendental functions and square roots all have quite distinctive features and their formal verifications differ widely from each other. The present proofs have a number of interesting features, and show how important some theorem prover features — in particular programmability — are. The formal verifications are conducted using the freely available 1 HOL Light prover (Harrison, 1996). HOL Light is a version of HOL (Gordon and Melham, 1993), itself a descendent of Edinburgh LCF
Java's Integral Types in PVS
 Formal Methods for Open ObjectBased Distributed Systems (FMOODS 2003), volume 2884 of LNCS
, 2003
"... This paper extends PVS's standard bitvector library with multiplication, division and remainder operations, together with associated results. This extension is needed to give appropriate semantics to Java's integral types in program verification. Special emphasis is therefore put on Java's wideni ..."
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Cited by 6 (1 self)
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This paper extends PVS's standard bitvector library with multiplication, division and remainder operations, together with associated results. This extension is needed to give appropriate semantics to Java's integral types in program verification. Special emphasis is therefore put on Java's widening and narrowing functions in relation to the newly defined operations on bitvectors.
Floatingpoint verification
 International Journal Of ManMachine Studies
, 1995
"... Abstract: This paper overviews the application of formal verification techniques to hardware in general, and to floatingpoint hardware in particular. A specific challenge is to connect the usual mathematical view of continuous arithmetic operations with the discrete world, in a credible and verifia ..."
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Cited by 3 (0 self)
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Abstract: This paper overviews the application of formal verification techniques to hardware in general, and to floatingpoint hardware in particular. A specific challenge is to connect the usual mathematical view of continuous arithmetic operations with the discrete world, in a credible and verifiable way.
Proof Assistants: history, ideas and future
"... In this paper we will discuss the fundamental ideas behind proof assistants: What are they and what is a proof anyway? We give a short history of the main ideas, emphasizing the way they ensure the correctness of the mathematics formalized. We will also briefly discuss the places where proof assista ..."
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In this paper we will discuss the fundamental ideas behind proof assistants: What are they and what is a proof anyway? We give a short history of the main ideas, emphasizing the way they ensure the correctness of the mathematics formalized. We will also briefly discuss the places where proof assistants are used and how we envision their extended use in the future. While being an introduction into the world of proof assistants and the main issues behind them, this paper is also a position paper that pushes the further use of proof assistants. We believe that these systems will become the future of mathematics, where definitions, statements, computations and proofs are all available in a computerized form. An important application is and will be in computer supported modelling and verification of systems. But their is still along road ahead and we will indicate what we believe is needed for the further proliferation of proof assistants.
Guaranteed Precision for Transcendental and Algebraic Computation made Easy
, 2006
"... Dedicated to the friends and families who blessed and supported me iv ..."
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Cited by 2 (2 self)
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Dedicated to the friends and families who blessed and supported me iv
Isolating critical cases for reciprocals using integer factorization
"... One approach to testing and/or proving correctness of a floatingpoint algorithm computing a function f is based on finding input floatingpoint numbers a such that the exact result f(a) is very close to a “rounding boundary”, i.e. a floatingpoint number or a midpoint between them. In the present p ..."
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One approach to testing and/or proving correctness of a floatingpoint algorithm computing a function f is based on finding input floatingpoint numbers a such that the exact result f(a) is very close to a “rounding boundary”, i.e. a floatingpoint number or a midpoint between them. In the present paper we show how to do this for the reciprocal function by utilizing prime factorizations. We present the method and show examples, as well as making a fairly detailed study of its expected and worstcase behavior. We point out how this analysis of reciprocals can be useful in analyzing certain reciprocal algorithms, and also show how the approach can be trivially adapted to the reciprocal square root function.
NewtonRaphson Algorithms for FloatingPoint Division Using an FMA
"... Since the introduction of the Fused Multiply and Add (FMA) in the IEEE7542008 standard [6] for floatingpoint arithmetic, division based on NewtonRaphson’s iterations becomes a viable alternative to SRTbased divisions. The NewtonRaphson iterations were already used in some architecture prior to ..."
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Cited by 1 (1 self)
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Since the introduction of the Fused Multiply and Add (FMA) in the IEEE7542008 standard [6] for floatingpoint arithmetic, division based on NewtonRaphson’s iterations becomes a viable alternative to SRTbased divisions. The NewtonRaphson iterations were already used in some architecture prior to the revision of the IEEE754 norm. For example, Itanium architecture already used this kind of iterations [8]. Unfortunately, the proofs of the correctness of binary algorithms do not extend to the case of decimal floatingpoint arithmetic. In this paper, we present general methods to prove the correct rounding of division algorithms using NewtonRaphson’s iterations in software, for radix 2 and radix 10 floatingpoint arithmetic. Keywords floatingpoint arithmetic; decimal floatingpoint arithmetic; division
Some issues related to double roundings
, 2011
"... Double rounding is a phenomenon that may occur when different floatingpoint precisions are available on a same system, or when performing scaled operations whose final result is subnormal. Although double rounding is, in general, innocuous, it may change the behavior of some useful small floatingp ..."
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Double rounding is a phenomenon that may occur when different floatingpoint precisions are available on a same system, or when performing scaled operations whose final result is subnormal. Although double rounding is, in general, innocuous, it may change the behavior of some useful small floatingpoint algorithms. We analyze the potential influence of double roundings on the Fast2Sum and 2Sum algorithms, on some summation algorithms, and Veltkamp’s splitting. We also show how to handle possible double roundings when performing scaled NewtonRaphson division iterations (to avoid possible underflow problems).
Software Implementations of Division and Square Root Operations for Intel ® Itanium ® Processors
"... Division and square root are basic operations defined by the IEEE Standard 7541985 for Binary FloatingPoint Arithmetic [1], and are implemented in hardware in most modern processors. In recent years however, software implementations of these operations have become competitive. The first IEEEcorrec ..."
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Division and square root are basic operations defined by the IEEE Standard 7541985 for Binary FloatingPoint Arithmetic [1], and are implemented in hardware in most modern processors. In recent years however, software implementations of these operations have become competitive. The first IEEEcorrect implementations in software of the division and square root operations in a mainstream processor appeared in the 1980s [2]. Since then, several major processor architectures adopted similar solutions for division and square root algorithms, including the Intel ® Itanium ® Processor Family (IPF). Since the first software algorithms for division and square root were designed and used, improved algorithms were found and complete correctness proofs were carried out. It is maybe possible to improve these algorithms even further. The present paper gives an overview of the IEEEcorrect division and square root algorithms for Itanium processors. As examples, a few algorithms for single precision are presented and properties used in proving their IEEE correctness are stated. NonIEEE variants, less accurate but faster, of the division, square root and also reciprocal and reciprocal square root operations are discussed. Finally, accuracy and performance numbers are given. The algorithms presented here are inlined by the Intel and other compilers for IPF, whenever division and square root operations are performed.