Abstract not found

Abstract—We present a 32 32 pixels contrast retina microchip that provides its output as an address event representation (AER) stream. Spatial contrast is computed as the ratio between pixel photocurrent and a local average between neighboring pixels obtained with a diffuser network. This current-based computation produces an important amount of mismatch between neighboring pixels, because the currents can be as low as a few pico-amperes. Consequently, a compact calibration circuitry has been included to trimm each pixel. Measurements show a reduction in mismatch standard deviation from 57 % to 6.6 % (indoor light). The paper describes the design of the pixel with its spatial contrast computation and calibration sections. About one third of pixel area is used for a 5-bit calibration circuit. Area of pixel is SV m ST m, while its current consumption is about 20 nA at 1-kHz event rate. Extensive experimental results are provided for a prototype fabricated in a standard 0.35- m CMOS process. Index Terms—Address-event representation (AER), analog circuits, artifical retina, calibration, contrast computation, currentmode circuits, imagers, low-power circuits and systems, mismatch, neuromorphic circuits, sensory systems, trimming, vision systems, weak inversion circuits. I.

Abstract not found

ACKNOWLEDGEMENTS I want to thank all the members of my group, my advisor, and my committee for all their help and time.

: This paper proposes a design methodology for the semi-automatic derivation of hardware dedicated to a generic class of image analysis reconstruction problems. The study will focus on the implications on the harware of the associated estimation algorithm and of the built-in underlying minimization. A specific minimization strategy has been designed with a view to improving the efficiency of specialized hardware (in terms of clock cycle and surface area). Convergence proofs are given in the appendix. This new non-linear minimization has proved to be almost 4 times faster than the classical method used in such a context. The vlsi derivation tool presented here is based on a high-level specification of the updating rules defining the problem at hand. The complete derivation is illustrated on an edge-preserving optical-flow estimator and on image restoration. Key-words: Robust cost function, Alternate minimization,vlsi derivation (R'esum'e : tsvp) * Valoria, Universit'e de Bretagne Sud,...

A low-power, CMOS retina with real-time, pixel-level processing capabilities is presented. Features extraction and edge enhancement are implemented with fully programmable 1D Gabor convolutions. An equivalent computation rate of 3 GOPs is obtained at the cost of very low-power consumption (1.5 µWper pixel), providing real-time performances (50 microseconds for overall com-putation, 0.5GOPs/mW). Experimental results from the first realized prototype show a very good matching between measures and expected outputs.