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Monomial Representations for GrÃ¶bner Bases Computations
 Proceedings of ISSAC 1998, ACM Press
, 1998
"... Monomial representations and operations for Grobner bases computations are investigated from an implementation point of view. The technique of vectorized monomial operations is introduced and it is shown how it expedites computations of Grobner bases. Furthermore, a rankbased monomial representatio ..."
Abstract

Cited by 16 (1 self)
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Monomial representations and operations for Grobner bases computations are investigated from an implementation point of view. The technique of vectorized monomial operations is introduced and it is shown how it expedites computations of Grobner bases. Furthermore, a rankbased monomial representation and comparison technique is examined and it is concluded that this technique does not yield an additional speedup over vectorized comparisons. Extensive benchmark tests with the Computer Algebra System Singular are used to evaluate these concepts. 1 Introduction The method of Grobner bases (GB) (see, for example, [8] for an introduction) is undoubtly one of the most important and prominent success stories of the field of Computer Algebra. Starting in the 1960's, an unsolved problem has developed into an essential computational tool with a great variety of applications and more and more powerful implementations. The heart of the GB method are computations of Grobner or Standard bases with...
Design of a Systolic Coprocessor for Rational Addition
, 1996
"... We design a systolic coprocessor for the addition of signed normalized rational numbers. This is the most complicated rational operation: it involves GCD, exact division, multiplication and addition /subtraction. In particular, the implementation of GCD and exact division improve significantly (2 to ..."
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We design a systolic coprocessor for the addition of signed normalized rational numbers. This is the most complicated rational operation: it involves GCD, exact division, multiplication and addition /subtraction. In particular, the implementation of GCD and exact division improve significantly (2 to 4 times) previously known solutions. In contrast to the traditional approach, all operations are performed leastsignificant digits first. This allows bitpipelining between partial operations at reduced areacost. An Atmel FPGA design for 8bit operands consumes 730 cells (3,500 equivalent gates) and runs at 25 MHz (5 MHz after layout). For 32bit operands this would be in the same timing range as the software solutions, however, a significant speedup can be expected for longer operands because the linear timecomplexity of the hardware algorithms. 1 Introduction The operations with rational numbers (also referred as arbitrary precision arithmetic) are the basic building block for algebr...