Results 1  10
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30
Verifying Analog Oscillator Circuits Using Forward/Backward Abstraction Refinement
 In DATE 2006: Design, Automation and Test in Europe
, 2006
"... Properties of analog circuits can be verified formally by partitioning the continuous state space and applying hybrid system verification techniques to the resulting abstraction. To verify properties of oscillator circuits, cyclic invariants need to be computed. Methods based on forward reachability ..."
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Cited by 26 (1 self)
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Properties of analog circuits can be verified formally by partitioning the continuous state space and applying hybrid system verification techniques to the resulting abstraction. To verify properties of oscillator circuits, cyclic invariants need to be computed. Methods based on forward reachability have proven to be inefficient and in some cases inadequate in constructing these invariant sets. In this paper we propose a novel approach combining forward and backwardreachability while iteratively refining partitions at each step. The technique can yield dramatic memory and runtime reductions. We illustrate the effectiveness by verifying, for the first time, the limit cycle oscillation behavior of a thirdorder model of a differential VCO circuit. 1.
Verification of analog/mixedsignal circuits using labeled hybrid petri nets
 IN: PROC. OF ICCAD
, 2006
"... System on a chip design results in the integration of digital, analog, and mixedsignal circuits on the same substrate which further complicates the already difficult validation problem. This paper presents a new model, labeled hybrid Petri nets (LHPNs), that is developed to be capable of modeling s ..."
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Cited by 16 (7 self)
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System on a chip design results in the integration of digital, analog, and mixedsignal circuits on the same substrate which further complicates the already difficult validation problem. This paper presents a new model, labeled hybrid Petri nets (LHPNs), that is developed to be capable of modeling such a heterogeneous set of components. This paper also describes a compiler from VHDLAMS to LHPNs. To support formal verification, this paper presents an efficient zonebased state space exploration algorithm for LHPNs. This algorithm uses a process known as warping to allow zones to describe continuous variables that may be changing at variable rates. Finally, this paper describes the application of this algorithm to a couple of analog/mixedsignal circuit examples.
Analog/MixedSignal Circuit Verification Using Models Generated from Simulation Traces ⋆
"... Abstract. Formal and semiformal verification of analog/mixedsignal circuits is complicated by the difficulty of obtaining circuit models suitable for analysis. We propose a method to generate a formal model from simulation traces. The resulting model is conservative in that it includes all of the ..."
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Cited by 9 (4 self)
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Abstract. Formal and semiformal verification of analog/mixedsignal circuits is complicated by the difficulty of obtaining circuit models suitable for analysis. We propose a method to generate a formal model from simulation traces. The resulting model is conservative in that it includes all of the original simulation traces used to generate it plus additional behavior. Information obtained during the model generation process can also be used to refine the simulation and verification process. 1
Statistical model checking: An overview
 RV 2010
, 2010
"... Quantitative properties of stochastic systems are usually specified in logics that allow one to compare the measure of executions satisfying certain temporal properties with thresholds. The model checking problem for stochastic systems with respect to such logics is typically solved by a numerical a ..."
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Cited by 7 (1 self)
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Quantitative properties of stochastic systems are usually specified in logics that allow one to compare the measure of executions satisfying certain temporal properties with thresholds. The model checking problem for stochastic systems with respect to such logics is typically solved by a numerical approach [31,8,35,22,21,5] that iteratively computes (or approximates) the exact measure of paths satisfying relevant subformulas; the algorithms themselves depend on the class of systems being analyzed as well as the logic used for specifying the properties. Another approach to solve the model checking problem is to simulate the system for finitely many executions, and use hypothesis testing to infer whether the samples provide a statistical evidence for the satisfaction or violation of the specification. In this tutorial, we survey the statistical approach, and outline its main advantages in terms of efficiency, uniformity, and simplicity.
Time domain verification of oscillator circuit properties
 Workshop on Formal Verification of Analog Circuits, FAC’05
, 2005
"... The application of formal methods to analog and mixed signal circuits requires efficient methods for constructing abstractions of circuit behaviors. This paper concerns the verification of properties of oscillator circuits. Generic monitor automata are proposed to facilitate the application of hybri ..."
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Cited by 6 (0 self)
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The application of formal methods to analog and mixed signal circuits requires efficient methods for constructing abstractions of circuit behaviors. This paper concerns the verification of properties of oscillator circuits. Generic monitor automata are proposed to facilitate the application of hybrid system reachability computations to characterize time domain features of oscillatory behavior, such as bounds on the signal amplitude and jitter. The approach is illustrated for a nonlinear tunneldiode circuit model using PHAVer, a hybrid system analysis tool that provides sound verification results based on linear hybrid automata approximations and infinite precision computations. Key words: verification, oscillators, analog circuits, hybrid systems, hybrid automata 1
Fainekos, “Falsification of temporal properties of hybrid systems using the crossentropy method
 in HSCC. ACM
"... Randomized testing is a popular approach for checking properties of large embedded system designs. It is well known that a uniform random choice of test inputs is often suboptimal. Ideally, the choice of inputs has to be guided by choosing the right input distributions in order to expose cornercas ..."
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Cited by 5 (3 self)
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Randomized testing is a popular approach for checking properties of large embedded system designs. It is well known that a uniform random choice of test inputs is often suboptimal. Ideally, the choice of inputs has to be guided by choosing the right input distributions in order to expose cornercase violations. However, this is also known to be a hard problem, in practice. In this paper, we present an application of the crossentropy method for adaptively choosing input distributions for falsifying temporal logic properties of hybrid systems. We present various choices for representing input distribution families for the crossentropy method, ranging from a complete partitioning of the input space into cells to a factored distribution of the input using graphical models. Finally, we experimentally compare the falsification approach using the crossentropy method to other stochastic and heuristic optimization techniques implemented inside the tool STaliro over a set of benchmark systems. The performance of the cross entropy method is quite promising. We find that sampling inputs using the crossentropy method guided by trace robustness can discover violations faster, and more consistently than the other competing methods considered.
Robustness of modelbased simulations
 In IEEE RTSS
, 2009
"... Abstract—This paper proposes a framework for determining the correctness and robustness of simulations of hybrid systems. The focus is on simulations generated from modelbased design environments and, in particular, Simulink. The correctness and robustness of the simulation is guaranteed against fl ..."
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Cited by 4 (0 self)
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Abstract—This paper proposes a framework for determining the correctness and robustness of simulations of hybrid systems. The focus is on simulations generated from modelbased design environments and, in particular, Simulink. The correctness and robustness of the simulation is guaranteed against floatingpoint rounding errors and system modeling uncertainties. Toward that goal, selfvalidated arithmetics, such as interval and affine arithmetic, are employed for guaranteed simulation of discretetime hybrid systems. In the case of continuoustime hybrid systems, selfvalidated arithmetics are utilized for overapproximations of reachability computations.
Symbolic Model Checking of Analog/MixedSignal Circuits
"... This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDLAMS, a hardware description language for AMS circuits. The VHDLAMS description is compiled into labeled hybrid Petri nets (LHPNs) in whic ..."
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Cited by 4 (4 self)
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This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDLAMS, a hardware description language for AMS circuits. The VHDLAMS description is compiled into labeled hybrid Petri nets (LHPNs) in which analog values are modeled as continuous variables that can change at rates in a bounded range and digital values are modeled using Boolean signals. System properties are specified as temporal logic formulas using timed CTL (TCTL). The verification proceeds over the structure of the formula and maps separation predicates to Boolean variables. The state space is thus represented as a Boolean function using a binary decision diagram (BDD) and the verification algorithm relies on the efficient use of BDD operations.
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits
, 2008
"... Abstract. Analog/Mixedsignal (AMS) circuit verification is a growing problem as process variation increases and AMS circuits become more functionally complex. To improve analog verification flows, AMS circuit models are needed at different levels of abstraction. This paper discusses recent work and ..."
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Cited by 4 (0 self)
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Abstract. Analog/Mixedsignal (AMS) circuit verification is a growing problem as process variation increases and AMS circuits become more functionally complex. To improve analog verification flows, AMS circuit models are needed at different levels of abstraction. This paper discusses recent work and future directions for abstract model generation and simulation aided verification of AMS circuits. In particular, a CMOS ring oscillator with feedforward inverters is used as a motivating example for the work. This example highlights progress and future directions in AMS modeling and verification. 1