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Automata Based Symbolic Reasoning in Hardware Verification
, 1998
"... . We present a new approach to hardware verification based on describing circuits in Monadic Secondorder Logic (M2L). We show how to use this logic to represent generic designs like nbit adders, which are parameterized in space, and sequential circuits, where time is an unbounded parameter. M2L ad ..."
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Cited by 19 (11 self)
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. We present a new approach to hardware verification based on describing circuits in Monadic Secondorder Logic (M2L). We show how to use this logic to represent generic designs like nbit adders, which are parameterized in space, and sequential circuits, where time is an unbounded parameter. M2L admits a decision procedure, implemented in the Mona tool [17], which reduces formulas to canonical automata. The decision problem for M2L is nonelementary decidable and thus unlikely to be usable in practice. However, we have used Mona to automatically verify, or find errors in, a number of circuits studied in the literature. Previously published machine proofs of the same circuits are based on deduction and may involve substantial interaction with the user. Moreover, our approach is orders of magnitude faster for the examples considered. We show why the underlying computations are feasible and how our use of Mona generalizes standard BDDbased hardware reasoning. 1. Introduction Correctnes...
Beyond the Finite in Automatic Hardware Verification
, 1996
"... We present a new approach to hardware verification based on describing circuits in Monadic Secondorder Logic (M2L). We show how to use this logic to represent generic designs like nbit adders, which are parameterized in space, and sequential circuits, where time is an unbounded parameter. M2L admi ..."
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We present a new approach to hardware verification based on describing circuits in Monadic Secondorder Logic (M2L). We show how to use this logic to represent generic designs like nbit adders, which are parameterized in space, and sequential circuits, where time is an unbounded parameter. M2L admits a decision procedure, implemented in the Mona tool [16], which reduces formulas to canonical automata. The decision problem for M2L is nonelementary decidable and thus unlikely to be usable in practice. However, we have used Mona to automatically verify, or find errors in, a number of circuits studied in the literature. Previously published machine proofs of the same circuits are based on deduction and may involve substantial interaction with the user. Moreover, our approach is orders of magnitude faster for the examples considered. We show why the underlying computations are feasible and how our use of Mona generalizes standard BDDbased hardware reasoning. 1 Introduction Correctness ...
Rapport n o RR2010022Functional Term Rewriting Systems
"... Abstract. This reseach report proposes the theoretical foundations of a new formal tool for symbolic verification of finite systems. Some approaches reduce the problem of system verification to the reachability problem in term rewriting systems (TRSs). In our approach, states are encoded by terms in ..."
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Abstract. This reseach report proposes the theoretical foundations of a new formal tool for symbolic verification of finite systems. Some approaches reduce the problem of system verification to the reachability problem in term rewriting systems (TRSs). In our approach, states are encoded by terms in a BDDlike manner and the transition relation is represented by a new rewriting relation so called Functional Term Rewriting Systems (FTRSs). First, we show that FTRSs are as expressive as TRSs. Then, we focus on a subclass of FTRSs, so called Elementary Functional Term Rewriting Systems (EFTRSs), and we show that EFTRSs preserve the FTRSs expressiveness. The main advantage of EFTRSs is that they are well adapted for acceleration techniques usually used in saturation algorithms on BDDlike data structures. Our experiments show that for wellknown protocols (e.g. Tree Arbiter, Percolate, Round Robin Mutex protocols,...) our tool is not only better than other rewriting tools such as Timbuk or Maude, but also competitive with other modelcheckers such as SPIN, NuSMV or SMART. Moreover, it can also be applied to modelchecking invariant properties which are a particular subclass of linear temporal logic formula (LTL). 1