Lambda lifting is a technique for transforming a functional program with local function definitions, possibly with free variables in the function definitions, into a program consisting only of global function (combinator) definitions which will be used as rewrite rules. Different ways of doing lambda lifting are presented, as well as reasons for rejecting or selecting the method used in our Lazy ML compiler. An attribute grammar and a functional program implementing the chosen algorithm is given. Originally publised in Proceedings 1985 Conference on Functional Programming Languages and Computer Architecture, Lecture Notes in Computer Science 201, Nancy, France, 1985. Springer Verlag. y As part B of author's thesis. Main addition: the attribute grammar formulation. 1 Introduction When compiling a lazy functional language using the technique described in [Joh84] it is presumed that the input program is in the form of a set of function definitions, possibly mutually recursive, tog...

We have implemented a parallel graph reducer on a commercially available shared memory multiprocessor (a Sequent Symmetry TM ), that achieves real speedup compared to a a fast compiled implementation of the conventional Gmachine. Using 15 processors, this speedup ranges between 5 and 11, depending on the program. Underlying the implementation is an abstract machine called the h; Gi-machine. We describe the sequential and the parallel h; Gi-machine, and our implementation of them. We provide performance and speedup figures and graphs. 1 Introduction Compiled graph reduction, as embodied in the G-machine and the Lazy ML compiler [Aug84, Joh84] has proved to be rather an efficient way to implement lazy functional languages on conventional machines. In this paper we report our results on extending these compilation techniques for parallel computers. We have implemented a parallel graph reduction system, a modified parallel G-machine, in a commercially available shared memory multicomput...

Abstract. For the memory intensive task of graph reduction, modern PCs are limited not by processor speed, but by the rate that data can travel between processor and memory. This limitation is known as the von Neumann bottleneck. We explore the effect of widening this bottleneck using a special-purpose graph reduction machine with wide, parallel memories. Our prototype machine – the Reduceron – is implemented using an FPGA, and is based on a simple template-instantiation evaluator. Running at only 91.5MHz on an FPGA, the Reduceron is faster than mature bytecode implementations of Haskell running on a 2.8GHz PC. 1

The performance of program-derived combinator graph reduction is known to be superior to that of graph reduction based on a fixed set of standard combinator. The major advantage of program-derived combinator reduction is that it uses less transient store than standard combinator reduction. We show on what activities a combinator reduction algorithm spends its execution time. Based on this analysis we show that it depends to a large extent on the application how much faster a program will run if programderived combinator are used instead of standard combinator. The analysis is based on experimental evidence obtained from a small bench-mark of medium-size functional programs. Performance gains of up to 11 × are reported for target architectures on which each memory reference consumes one unit of time. The results are valid for implementations of combinator graph reduction that use binary graphs. KEY WORDS Turner’s combinator G-machine Performance modelling Graph reduction Instruction level timing Small functional bench-mark

The G-machine is a stack machine for von-Neumann-like execution of lazy functional languages, using graph reduction. This paper describes how target code generation from G-machine code is performed in a compiler for Lazy ML. We briefly review the G-machine, and the compiler phases preceding the target code generation. Two different target code generation methods are described, as well as essential parts of the run-time system. The first target code generator is very simple, generating naive code by means of `macro expansion'. This code explicitly manipulates the stacks exactly as prescribed by the G-machine instructions. A simple peep-hole code improver can remove a fair amount of the most glaring inefficiencies of the naive code. The second target code generator is less naive, taking a more systematic approach to avoid redundant operations in the resulting target code. This code generator can be neatly expressed as an attribute grammar over the G-machine code sequence. 1 Introductio...