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Modelling of Communication Contention in Multiprocessors
- in Proceedings of Modeling Techniques and Tools for Computers - Performance Evaluation, LNCS
, 1994
"... . This paper deals with performance evaluation and modelling of point-to-point communications in parallel machines with distributed memory. Existing models of point-to-point communications in contentionfree networks are presented. A major drawback of these models is that they do not reflect the beha ..."
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. This paper deals with performance evaluation and modelling of point-to-point communications in parallel machines with distributed memory. Existing models of point-to-point communications in contentionfree networks are presented. A major drawback of these models is that they do not reflect the behavior of the network during the execution of a real parallel application. A general methodology for studying the effect of contention on point-to-point communications under "reasonable" load is presented here. This methodology has been applied on the software router VCR on a Meganode. Keywords: point-to-point communications, performance evaluation, modelling, contention, VCR. 1 Introduction Parallel machines are used to run faster, and from this point of view performance is essential. In parallel machines with distributed memory the speed-up is limited by the cost of communication and synchronization. The ratio communication speed/computation speed determines the best possible level of gran...
ANDES: Evaluating Mapping Strategies with Synthetic Programs
- Euromicro J. of Systems Architecture
, 1997
"... This paper presents the ANDES performance evaluation tool. ANDES is based on the synthetic execution of parallel programs and it is used for the evaluation of mapping strategies. The Meganode, a distributed memory parallel computer, is considered as our target architecture. ANDES takes into account ..."
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This paper presents the ANDES performance evaluation tool. ANDES is based on the synthetic execution of parallel programs and it is used for the evaluation of mapping strategies. The Meganode, a distributed memory parallel computer, is considered as our target architecture. ANDES takes into account a benchmark of quantitative models of parallel algorithms and a set of mapping strategies (greedy and iterative algorithms are used). We show how this tool allows an extensive comparison of mapping strategies by using the benchmark, the mapping strategies and different cost functions. 1 Introduction Distributed memory multiprocessors (DMM) are the current trend of high-performance parallel computers. They represent a good balance between cost and performance, mainly because of the connection of several commercial, general and relatively cheap microprocessors. A distributed memory multiprocessor is a computer composed of autonomous processors connected by a high speed communication network....
EDPEPPS: An Environment for the Design and Performance Evaluation of Portable Parallel Software
, 1996
"... This paper describes the architecture of a development environment for computer-aided parallel software engineering. The environment comprises tools for program design, simulation, and visualisation. The toolset supports an interactive, performance-oriented software development life-cycle, and the u ..."
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This paper describes the architecture of a development environment for computer-aided parallel software engineering. The environment comprises tools for program design, simulation, and visualisation. The toolset supports an interactive, performance-oriented software development life-cycle, and the user interface makes extensive use of graphics and animation. 1 Introduction The recent rapid growth of parallel cluster computing has signalled the urgent need for tools to support a parallel program design life-cycle. Concurrent programs are certainly no less complex than serial ones, but whereas serial programmers can rely on a simple and stable programming model (the von Neumann machine), parallel programmers must cope with two additional issues: platform configuration; and mapping (of the concurrent program onto the parallel platform). In high-performance computing, many assumptions made by serial software engineers no longer hold. For example, in serial life-cycle models, performance e...

