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53
A Continuous Approach to Inductive Inference
 Mathematical Programming
, 1992
"... In this paper we describe an interior point mathematical programming approach to inductive inference. We list several versions of this problem and study in detail the formulation based on hidden Boolean logic. We consider the problem of identifying a hidden Boolean function F : f0; 1g n ! f0; 1g ..."
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Cited by 38 (2 self)
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In this paper we describe an interior point mathematical programming approach to inductive inference. We list several versions of this problem and study in detail the formulation based on hidden Boolean logic. We consider the problem of identifying a hidden Boolean function F : f0; 1g n ! f0; 1g using outputs obtained by applying a limited number of random inputs to the hidden function. Given this inputoutput sample, we give a method to synthesize a Boolean function that describes the sample. We pose the Boolean Function Synthesis Problem as a particular type of Satisfiability Problem. The Satisfiability Problem is translated into an integer programming feasibility problem, that is solved with an interior point algorithm for integer programming. A similar integer programming implementation has been used in a previous study to solve randomly generated instances of the Satisfiability Problem. In this paper we introduce a new variant of this algorithm, where the Riemannian metric used...
ESPRESSOSIGNATURE: A New Exact Minimizer for Logic Functions
 Proc. DAC ’93
, 1996
"... We present a new algorithm for exact twolevel logic optimization. We represent a set of primes by the cube of their intersection. Therefore, the unique set of sets of primes which forms the covering problem can be implicitly represented by a set of cubeswhich forms a minimum canonical cover. We obt ..."
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Cited by 30 (1 self)
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We present a new algorithm for exact twolevel logic optimization. We represent a set of primes by the cube of their intersection. Therefore, the unique set of sets of primes which forms the covering problem can be implicitly represented by a set of cubeswhich forms a minimum canonical cover. We obtain the minimum canonical cover starting from any initial cover and then derive the table covering problem. The method is effective; it improves on the runtime and memory usage of ESPRESSOEXACT by average factors of 1.78 and 1.2x respectively on the 114 of 134 benchmark examples that could be completed by ESPRESSOEXACT. Of the remaining 20 hard problems, we solve 14 exactly. For 3 of the remaining 6 we derive the covering table but the covering problem could not be solved exactly. The remaining 3 remains intractable for the moment. This research supported by Fujitsu Research y Department of Electrical Engineering and Computer Sciences, University of California Berkeley 1 Introduction...
SOCRATES: A system for automatically synthesizing and optimizing combinational logic
 in 23rd Design Automation Conference
, 1986
"... This paper presents SOCRATES, a system of programs which Synthesize and optimize combinational logic circuits, from boolean equations. SOCRATES optimizes logic using boolean and algebraic minimization techniques, and it optimizes circuits derived from this logic in a user defined technology with a ..."
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Cited by 28 (1 self)
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This paper presents SOCRATES, a system of programs which Synthesize and optimize combinational logic circuits, from boolean equations. SOCRATES optimizes logic using boolean and algebraic minimization techniques, and it optimizes circuits derived from this logic in a user defined technology with a rule based expert system. This paper discusses the goals of logic synthesis and the capabilities needed in a tool to meet these goals. SOCRATES’s capabilities are then presented and demonstrated with experiments run on circuits from the 1986 Design Automation Conference synthesis benchmark set.
Training Digital Circuits with Hamming Clustering
 IEEE TRANSACTIONS ON CIRCUIT AND SYSTEMS
, 2000
"... A new algorithm, called Hamming Clustering (HC), for the solution of classification problems with binary inputs is proposed. It builds a logical network containing only and, or and not ports, which, besides satisfying all the inputoutput pairs included in a given finite consistent training set, ..."
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Cited by 19 (15 self)
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A new algorithm, called Hamming Clustering (HC), for the solution of classification problems with binary inputs is proposed. It builds a logical network containing only and, or and not ports, which, besides satisfying all the inputoutput pairs included in a given finite consistent training set, is able to reconstruct the underlying Boolean function. The basic
Optimum and Suboptimum Algorithms for Input Encoding and its Relationship to Logic Minimization
 IEEE Trans. on CAD
, 1991
"... A new theoretical formulation of the input encoding problem is presented, based on the concept of compatibility of dichotomies. The input encoding problem is shown to be equivalent to a twolevel logic minimization. Three possible techniques to solve the encoding problem are discussed, based on: 1) ..."
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Cited by 17 (5 self)
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A new theoretical formulation of the input encoding problem is presented, based on the concept of compatibility of dichotomies. The input encoding problem is shown to be equivalent to a twolevel logic minimization. Three possible techniques to solve the encoding problem are discussed, based on: 1) techniques borrowed from classical logic minimization (generation of prime dichotomies and solving the covering problem), 2) graph coloring applied to the graph of incompatibility of dichotomies, and 3) extraction of essential prime dichotomies followed by graph coloring. The extraction of essential prime dichotomies serves the same purpose as the extraction of essential prime implicants in logic minimization, in the sense that it reduces the size of the covering/graph coloring problem. The conditions of optimality of the solutions to the input encoding problem are discussed. For nearoptimum results a powerful heuristic, based on iterative improvement technique, has been developed and imple...
Booledozer: Logic synthesis for ASICs
 IBM Journal of Research and Development
, 1996
"... Logic synthesis is the process of automatically generating optimized logic level representation from a highlevel description. With the rapid advances in integrated circuit technology and the resultant growth in design complexity, designers increasingly rely on logic synthesis to shorten the design ..."
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Cited by 14 (2 self)
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Logic synthesis is the process of automatically generating optimized logic level representation from a highlevel description. With the rapid advances in integrated circuit technology and the resultant growth in design complexity, designers increasingly rely on logic synthesis to shorten the design time, while achieving performance objectives. This paper describes the IBM logic synthesis system BooleDozer TM; including its organization, main algorithms and how it ts into the design process. The BooleDozer logic synthesis system has been widely used within IBM to successfully synthesize processor and ASIC designs. 1
An Interior Point Approach to Boolean Vector Function Synthesis
 In Proceedings of the 36th MSCAS
, 1993
"... The Boolean vector function synthesis problem can be stated as follows: Given a truth table with n input variables and m output variables, synthesize a Boolean vector function that describes the table. In this paper we describe a new formulation of the Boolean vector function synthesis problem as a ..."
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Cited by 13 (1 self)
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The Boolean vector function synthesis problem can be stated as follows: Given a truth table with n input variables and m output variables, synthesize a Boolean vector function that describes the table. In this paper we describe a new formulation of the Boolean vector function synthesis problem as a particular type of Satisfiability Problem. The Satisfiability Problem is translated into an integer programming feasibility problem, that is solved with an interior point algorithm for integer programming. Preliminary computational results are presented. Introduction The Boolean Vector Function Synthesis Problem has applications in logic, artificial intelligence, machine learning, and digital integrated circuit design. In this paper, we describe a Satisfiability Problem formulation of the Boolean Vector Function Synthesis Problem. This formulation can be approached with a wide range of algorithms. In this paper, preliminary computational results are presented using an interior point algorit...
An Introduction to Array Logic
 IBM Journal of Research and Development
, 1975
"... Abstract: After a discussion of the reasons for choosing to implement logic in array form. a detailed description of the nature of array logic is given. Topics specifically discussed include general array structures and implementation, influence of decoder partitioning, ..."
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Cited by 12 (0 self)
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Abstract: After a discussion of the reasons for choosing to implement logic in array form. a detailed description of the nature of array logic is given. Topics specifically discussed include general array structures and implementation, influence of decoder partitioning,
An application of multiplevalued logic to a design of programmable logic arrays
 In Proceedings of Int. Symposium on MultipleValued Logic
, 1978
"... Abstract: A threelevel programmable logic array (threelevel PLA) consists of three main parts, the D array, the AND array, and the OR array, and each of these arrays can be programmed. In this paper, a design method for threelevel PLA's is described. Main results obtained are I) The minimiza ..."
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Cited by 11 (2 self)
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Abstract: A threelevel programmable logic array (threelevel PLA) consists of three main parts, the D array, the AND array, and the OR array, and each of these arrays can be programmed. In this paper, a design method for threelevel PLA's is described. Main results obtained are I) The minimization of the AND array corresponds to the minimization of a multiplevalued input twovalued output logic function; 2) By using the theory of multiplevalued decomposition of twovalued function, the computation time and the memory requirement for the minimization of the AND array can be reduced; and 3) The design of multipleoutput function can be done in a similar way by introducing a variable which denotes the outputs. I.