Lava is a tool to assist circuit designers in specifying, designing, verifying and implementing hardware. It is a collection of Haskell modules. The system design exploits functional programming language features, such as monads and type classes, to provide multiple interpretations of circuit descriptions. These interpretations implement standard circuit analyses such as simulation, formal veri#cation and the generation of code for the production of real circuits.

Pure functional programming languages have been proposed as a vehicle to describe, simulate and manipulate circuit specifications. We propose an extension to Haskell to solve a standard problem when manipulating data types representing circuits in a lazy functional language. The problem is that circuits are finite graphs -- but viewing them as an algebraic (lazy) datatype makes them indistinguishable from potentially infinite regular trees. However, implementations of Haskell do indeed represent cyclic structures by graphs. The problem is that the sharing of nodes that creates such cycles is not observable by any function which traverses such a structure. In this paper we propose an extension to call-by-need languages which makes graph sharing observable. The extension is based on non updatable reference cells and an equality test (sharing detection) on this type. We show that this simple and practical extension has well-behaved semantic properties, which means that many typical source-to-source program transformations, such as might be performed by a compiler, are still valid in the presence of this extension.

Based on our experience with modelling and verifying microarchitectural designs within Haskell, this paper examines our use of Haskell as host for an embedded language. In particular, we highlight our use of Haskell's lazy lists, type classes, lazy state monad, and unsafePerformIO, and point to several areas where Haskell could be improved in the future. We end with an example of a benefit gained by bringing the functional perspective to microarchitectural modelling.

Modern microprocessors require an immense investment of time and effort to create and verify, from the high-level architectural design downwards. We are exploring ways to increase the productivity of design engineers by creating a domain-specific language for specifying and simulating processor architectures. We believe that the structuring principles used in modern functional programming languages, such as static typing, parametric polymorphism, first-class functions, and lazy evaluation provide a good formalism for such a domain-specific language, and have made initial progress by creating a library on top of the functional language Haskell. We have specified the integer subset of an out-of-order, superscalar DLX microprocessor, with register-renaming, a reorder buffer, a global reservation station, multiple execution units, and speculative branch execution. Two key abstractions of this library are the signal abstract data type (ADT), which models the simulation history of a wire, and the transaction ADT, which models the state of an entire instruction as it travels through the microprocessor. 1

Hawk is a language for the specification of microprocessors at the microarchitectural level. In this paper we use Hawk to specify a modern microarchitecture based on the Intel P6 with features such as speculation, register renaming, and superscalar out-of-order execution.

Contents 1 Introduction 4 2 Getting Started 6 2.1 Your First Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 The Lava Interpreter . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Your Second Circuit . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Generating VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 Bigger Circuits 12 3.1 Recursion over Lists . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 Connection Patterns . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.3 Arithmetic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.4 Compilation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.5 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 Verification 18 4.1 Simple Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 Quanti

www.dcs.gla.ac.uk/∼jtod/ Hydra is a computer hardware description language that integrates several kinds of software tool (simulation, netlist generation and timing analysis) within a single circuit specification. The design language is inherently concurrent, and it offers black box abstraction and general design patterns that simplify the design of circuits with regular structure. Hydra specifications are concise, allowing the complete design of a computer system as a digital circuit within a few pages. This paper discusses the motivations behind Hydra, and illustrates the system with a significant portion of the design of a basic RISC processor.

The Formal System Design methodology ForSyDe [1,2,3] is extended by a systematic refinement methodology based on transformations, which gradually transforms a high-level, function oriented system description into a synthesizable model. We group transformations according to three different criteria: (1) whether they preserve semantics or they constitute a design decision; (2) whether they are simple rewriting rules or complex patterns; (3) whether they transform combinatorial functions, skeletons or data types. We illustrate the use of transformations with three examples taken from an ATM based network terminal system. 1.

If functional programs are to be used for high-performance computing, efficient data representations and operations must be provided. Our contribution is a calculus for the analysis of the lengths of (nested) lists and a transformation into a form which is liberated from the chain of cons-operations and which sometimes permits array implementations even if the length depends on run-time values. A major advantage of functional programs vs. imperative programs is that dependence analysis is much easier, due to the absence of reassignments. One severe disadvantage of functional programs as of yet is that efficient, machine-oriented data structures (like the array) absolutely necessary for high-performance computing play a minor role in many language implementations since they do not harmonize with functional evaluation schemata (like graph reduction), which are at a higher level of abstraction. We propose to construct programs by composition of skeletons, i.e., functi...

The thesis discusses using ISO standard formal language LOTOS (Language of Temporal Ordering Specification) for formally specifying and analysing digital circuits. The study serves two-fold: it examines the possibility of extending applications of LOTOS outside its traditional areas, and provides a new formalism to aid designing correct hardware. Digital circuits are usually classified into synchronous (clocked) and asynchronous (un-clocked) circuits. The thesis addresses both of them. LOTOS models for signals, wires, components and component connections are established, together with the behavioural models of digital components in synchronous and asynchronous circuits. These formal models help to build the rigorous specifications of digital circuits, which are not only valuable documentation, but also the bases for further analysis. The investigation of the thesis shows that LOTOS is suitable for specifying digital circuits at various levels of abstraction. Compared with oth...