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A Low-Voltage Low-Power Wide-Range CMOS Variable Gain Amplifier
- IEEE Trans. Circuits Syst. II,v ol.45
, 1998
"... In this paper, a compact low-power (LP) low-voltage (LV) metal--oxide--semiconductor-only (MOS-only) variable gain amplifier (VGA) is introduced. This amplifier based on complementary MOS (CMOS) transistors operating in strong inversion is composed of a pseudo-exponential current-to-voltage converte ..."
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In this paper, a compact low-power (LP) low-voltage (LV) metal--oxide--semiconductor-only (MOS-only) variable gain amplifier (VGA) is introduced. This amplifier based on complementary MOS (CMOS) transistors operating in strong inversion is composed of a pseudo-exponential current-to-voltage converter, analog multiplier, and output stage. The gain of the amplifier is controlled exponentially by a novel wide-range pseudoexponential current-to-voltage converter implemented with two back-to-back connected current mirrors exhibiting superb exponential characteristic. Also, a new LV/LP composite transistor is introduced to increase the input dynamic range of the multiplier. The amplifier is fabricated using a 2-m MOSIS n-well process, and its simulation and measurement results are shown in detail. I. INTRODUCTION A LTHOUGH lower supply voltage directly translates to lower power consumption in digital circuits, a similar conclusion cannot necessarily be drawn for analog circuits. Therefore...
A single-chip CMOS transceiver for 802.11abg wireless LANs
- IEEE Journal of Solid-State Circuits
, 2004
"... Abstract—A dual-band trimode radio fully compliant with the IEEE 802.11a, b, and g standards is implemented in a 0.18- m CMOS process and packaged in a 48-pin QFN package. The transceiver achieves a receiver noise figure of 4.9/5.6 dB for the 2.4-GHz/5-GHz bands, respectively, and a transmit error v ..."
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Abstract—A dual-band trimode radio fully compliant with the IEEE 802.11a, b, and g standards is implemented in a 0.18- m CMOS process and packaged in a 48-pin QFN package. The transceiver achieves a receiver noise figure of 4.9/5.6 dB for the 2.4-GHz/5-GHz bands, respectively, and a transmit error vector magnitude (EVM) of 2.5 % for both bands. The transmit output power is digitally controlled, allowing per-packet power control as required by the forthcoming 802.11 h standard. A quadrature accuracy of 0.3 in phase and 0.05 dB in amplitude is achieved through careful analysis and design of the I/Q generation parts of the local oscillator. The local oscillators achieve a total integrated phase noise of better than 34 dBc. Compatibility with multiple baseband chips is ensured by flexible interfaces toward the A/D and D/A converters, as well as a calibration scheme not requiring any baseband support. The chip passes 2 kV human body model ESD testing on all pins, including the RF pins. The total die area is 12 mmP. The power consumption is 207 mW in the receive mode and 247 mW in the transmit mode using a 1.8-V supply. Index Terms—Dual conversion, IEEE 802.11a/b/g, orthogonal frequency-division multiplexing (OFDM), receiver, RF CMOS, RF

