Abstract — Delay-Insensitive (DI) circuits are a class of asynchronous circuits, whose correctness of operation is robust to arbitrary delays in modules or interconnection lines. Keller clarified the precise operating conditions of the class of DIcircuits, and presented a universal set of primitive modules from which any circuit in the class is realizable. Later, Patra presented an alternative universal set of primitive modules, and claimed that there is no universal set of primitives satisfying Keller’s conditions, in which the largest number of input and output lines of each primitive module is less than five. In this paper, we present new types of primitive modules, each having at most three input- and output-lines. and show they form a universal set of primitives. We achieve this reduction in complexity by allowing the input- and output-lines of modules to be bi-directional and to be able to buffer signals. The use of buffers in interconnection lines allows higher throughput of signals and results in circuits requiring less feedback lines, thus improving the efficiency of DI-circuits. The proposed class of DI-circuits is especially useful for implementations on cellular automata—an architecture that promises efficient implementations and manufacturing in nanotechnology due to its regular structure. Index Terms — asynchronous systems, delay-insensitive circuits, module, universality, bi-directional buffering lines I.

Predicting the behavior of complex decentralized pervasive computing systems before their deployment in a dynamic environment, as well as being able to influence and control their behavior in a decentralized way, will be of fundamental importance in the near future. In this context, this paper describes the general behavior observed in a large set of asynchronous cellular automata (CA) when external perturbations (expressions of a dynamic environment) influence the internal activities of CA cells. In particular, we observed that stable macro-level spatial structures emerge from local interactions among cells, a behavior that does not emerge when cellular automata are not perturbed. Because perturbed cellular automata express characteristics that strongly resemble those of pervasive computing systems, similar sorts of macro-level behaviors are likely to emerge in that context and need to be studied, controlled, and possibly fruitfully exploited. On this basis, the paper also reports the results of a set of experiments showing how it is possible to control, in a decentralized way, the behavior of perturbed cellular automata, to make some desired patterns emerge.

Computer science has served to insulate programs and programmers from knowledge of the underlying mechanisms used to manipulate information, however this fiction is increasingly hard to maintain as computing devices decrease in size and systems increase in complexity. Manifestations of these limits appearing in computers include scaling issues in interconnect, dissipation, and coding. Reconfigurable Asynchronous Logic Automata (RALA) is an alternative formulation of computation that seeks to align logical and physical descriptions by exposing rather than hiding this underlying reality. Instead of physical units being represented in computer programs only as abstract symbols, RALA is based on a lattice of cells that asynchronously pass state tokens corresponding to physical resources. We introduce the design of RALA, review its relationships to its many progenitors, and discuss its benefits,