Abstract — This paper presents a patterned ground shield inserted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1–2 GHz, the addition of the shield increases the inductor quality factor up to 33 % and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz vg tank can be nearly doubled with a shielded inductor. Index Terms — Inductor, inductor model, patterned ground shield, quality factor, self-resonance, substrate loss, substrate noise coupling. I.

Abstract—This paper presents the basis of the modeling of the MOS transistor for circuit simulation at RF. A physical equivalent circuit that can easily be implemented as a Spice subcircuit is first derived. The subcircuit includes a substrate network that accounts for the signal coupling occurring at HF from the drain to the source and the bulk. It is shown that the latter mainly affects the output admittance PP. The bias and geometry dependence of the subcircuit components, leading to a scalable model, are then discussed with emphasis on the substrate resistances. Analytical expressions of the parameters are established and compared to measurements made on a 0.25- m CMOS process. The parameters and transit frequency simulated with this scalable model versus frequency, geometry, and bias are in good agreement with measured data. The nonquasi-static effects and their practical implementation in the Spice subcircuit are then briefly discussed. Finally, a new thermal noise model is introduced. The parameters used to characterize the noise at HF are then presented and the scalable model is favorably compared to measurements made on the same devices used for the-parameter measurement. Index Terms—Modeling, MOS devices, MOSFET’s, RF CMOS IC, semiconductor device modeling, semiconductor device noise,

Abstract — In this paper the influence from substrate effects on the performance of wideband SiGe HBT mixer circuits is investigated. Equivalent circuit models including substrate networks are extracted from on-wafer test structures and compared with electromagnetic simulations. Electromagnetic simulations are also applied to predict short distance substrate coupling effects. Simulation results using extracted equivalent circuit models and substrate coupling networks are compared with experimental results obtained on a wideband mixer circuit implemented in a 0.35 µm, 60 GHz fT SiGe HBT BiCMOS process.

I would like to express my gratitude to all who have assisted me during the course of my academic career. I would like to thank my advisor, Dr. John D. Cressler, who has given me guidance and reassurance during my time here at Georgia Tech. I am especially appreciative of the amount of freedom he has extended to me over the years, in terms of research topics and areas of investigation. It has greatly enhanced my experience as a graduate student. I am also very grateful to all of my committee members, Dr. Joy Laskar, Dr. John Papapolymerou, Dr. Madhavan Swaminathan, and Dr. Dennis Hess. All have been extremely generous in sharing their time and expertise during this process. I know my work has improved significantly from their input and suggestions. I would also like to thank Mark Mitchell, Tracy Wallace, and the Georgia Tech Research Institute for their help and guidance during these past years. I am also extremely grateful to Jazz Semiconductor and IBM Microelectronics, both of which have allowed me access to their excellent technologies, which this work is based on.