A methodology for the automatic synthesis of full-custom IC layout with analog constraints is presented. The methodology guarantees that all performance constraints are met when feasible, or otherwise infeasibility is detected as soon as possible, thus providing a robust and efficient design environment. In the proposed approach, performance specifications are translated into lower level bounds on parasitics or geometric parameters, using sensitivity analysis. Bounds can be used by a set of specialized layout tools performing stack generation, placement, routing and compaction. For each tool, a detailed description is provided of its functionality, of the way constraints are mapped and enforced, and of its impact on the design flow. Examples drawn from industrial applications are reported to illustrate the effectiveness of the approach. Keywords--- Layout, Analog Design, Constraint-Driven Layout. I. Introduction The layout of analog circuits is intrinsically more difficult than the d...

In this paper, we address the routability and analog performance issues involved in routing for array-based FPAAs that have single-segment horizontal and vertical routing resources. We then present FAAR (Field-programmable Analog Array Router) and describe a routing algorithm developed for the target array-based FPAA architecture. Sequential routing technique is used for routing multi-terminalnets as well as multiple nets. Multi-terminal nets are broken into two-terminal pairs and routed. We use the notion of resource demand as a measure of the effect of a net-route on the routing of the other nets, while the number of programmable switches and the net-crossings are used as the metrics of interconnect parasitics. We present experiments to study the effect of various parameters such as the number of nets, terminals, CABs and IO cells on the routing as well as the performance degradation. FAAR routes with high efficiency while keeping performance degradation small, and has considerably s...

Due to the application of fast device technologies and the increasing complexity of printed-- circuit boards, electromagnetic phenomena, e.g., reflections and crosstalk, gain more and more importance and may even disturb the function of a circuit. In the future, it will be indispensable to consider phenomena of electromagnetic compatibility (EMC) already during layout synthesis. In this paper, robust methods are presented that make it possible for the first time to incorporate complex EMC--constraints and cost criteria into printed--circuit board routing. This includes both, concepts for the development and specification of EMC--design models and robust and efficient algorithms for EMC--driven routing which can handle these models. 1 Introduction The technological progress in manufacturing integrated circuits, modules, and boards yields higher frequency rates and more complex systems. As a result, electromagnetic phenomena, e.g., reflections and crosstalk, increasingly reduce performan...

Abstract. A tool set for the semiautomated design of analog fuzzy hardware for on{chip implementation is presented here. Based on the description of the desired behaviour, established for example by a commercial development tool and available in a standard format (FPL), this tools are able to generate all necessary data to describe a hardware cell providing the speci ed behaviour. Here analogous circuits espeacially in CMOS are considered. 1. Fuzzy hardware One of the most actual problems regarding the realization of technical systems is the speci cation and implementation of non{linear functionality. Here the fuzzy methodology is an interesting solution. It allows to describe problems in terms of human{like language constructs and is able to approximate non{linear functions with only little restrictions. Furthermore, it supplies a methodology to transform such constructs into formal expressions which can be implemented by well{known systems, e.g. standard software. Today such fuzzy systems are mainly designed using one of the fuzzy development tools available on the market. Mostly these tools are easy to use and o er di erent speci cation and simulation capabilities. Using such tools the speci ed behaviour of a developed system is expressed in terms of well{de ned language constructs. Starting from a behavioural description di erent ways are possible to implement a fuzzy controller:

In addition to automatically generating correct wiring, routers are used to meet additional design goals. Examples include reducing capacitive coupling and improving yield. Using routers to improve testability has been mentioned in the literature, but concrete rules or methods have not been explained or implemented. In this paper, we show how a modified router improves bridge fault testability for two different test metrics, static-voltage testing and pseudoexhaustive segmentation testing, with no significant increase in area or time. This method is flexible in that further testability improvements are possible by trading off area or routing time. 1 Introduction Modifications to the routing of a circuit can be made, either during or after the routing process, to meet secondary design goals. This has been shown and explored in several papers on reducing capacitive coupling [1--10] and improving yield [11--15]. What is common to these papers is that additional goals can be achieved by s...