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Complex Square Root with Operand Prescaling
 in "Journal of VLSI Signal Processing
, 2006
"... prescaling. We propose a radixr digitrecurrence algorithm for complex squareroot. The operand is prescaled to allow the selection of squareroot digits by rounding of the residual. This leads to a simple hardware implementation. Moreover, the use of digit recurrence approach allows correct roundin ..."
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Cited by 8 (4 self)
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prescaling. We propose a radixr digitrecurrence algorithm for complex squareroot. The operand is prescaled to allow the selection of squareroot digits by rounding of the residual. This leads to a simple hardware implementation. Moreover, the use of digit recurrence approach allows correct rounding of the result. The algorithm, compatible with the complex division, and its design are described at a highlevel. We also give rough comparisons of its latency and cost with respect to implementation based on standard floatingpoint instructions as used in software routines for complex square root. 1
A hardwareoriented method for evaluating complex polynomials
 IN IEEE INTERNATIONAL
, 2007
"... A hardwareoriented method for evaluating complex polynomials by solving a system of corresponding linear equations is proposed. It is based on the Emethod [2, 3], defined over reals, which uses efficient digitserial solution of diagonally dominant systems of linear equations on a simple and highl ..."
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Cited by 4 (2 self)
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A hardwareoriented method for evaluating complex polynomials by solving a system of corresponding linear equations is proposed. It is based on the Emethod [2, 3], defined over reals, which uses efficient digitserial solution of diagonally dominant systems of linear equations on a simple and highly regular hardware. Since the evaluation of polynomials can be achieved by solving the corresponding linear systems, the Emethod is an attractive general approach for polynomial evaluation. We show a transform of the Emethod to the complex domain, describe the complex polynomial evaluation algorithm, and discuss a corresponding design and implementation. We give estimates of the latency and the area.
Design of a Complex Divider
"... We describe a hardwareoriented design of a complex division algorithm proposed in . ..."
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Cited by 3 (3 self)
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We describe a hardwareoriented design of a complex division algorithm proposed in .
An Efficient Method for Evaluating Complex Polynomials
 J SIGN PROCESS SYST
, 2008
"... We propose an efficient hardwareoriented method for evaluating complex polynomials. The method is based on solving iteratively a system of linear equations. The solutions are obtained digitbydigit on simple and highly regular hardware. The operations performed are defined over the reals. We des ..."
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Cited by 2 (0 self)
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We propose an efficient hardwareoriented method for evaluating complex polynomials. The method is based on solving iteratively a system of linear equations. The solutions are obtained digitbydigit on simple and highly regular hardware. The operations performed are defined over the reals. We describe a complextoreal transform, a complex polynomial evaluation algorithm, the convergence conditions, and a corresponding design and implementation. The latency and the area are estimated for the radix2 case. The main features of the method are: the latency of about m cycles for an mbit precision; the cycle time independent of the precision; a design consisting of identical modules; and digitserial connections between the modules. The number of modules, each roughly corresponding to serialparallel multiplier without a carrypropagate adder, is 2(n + 1) for evaluating an nth degree complex polynomial. The method can also be used to compute all successive integer powers of the complex argument with the same latency and a similar implementation cost. The design allows straightforward tradeoffs between latency and cost: a factor k decrease in cost leads to a factor k increase in latency. A similar
Design and Implementation of a Radix4 Complex Division Unit with Prescaling
"... Abstract—We present a design and implementation of a radix4 complex division unit with prescaling of the operands. Specifically, we extend the treatment of the residual bound and errors due to the use of truncated redundant representation. The requirements for prescaling tables are simplified and a ..."
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Abstract—We present a design and implementation of a radix4 complex division unit with prescaling of the operands. Specifically, we extend the treatment of the residual bound and errors due to the use of truncated redundant representation. The requirements for prescaling tables are simplified and a detailed specification of the table design is given. All principal components used in the design are described and the proposed optimizations are explained. The target platform for implementation was an Altera Stratix II FPGA [15] for which we report timing and area requirements. For a precision of 36 bits, the implementation uses 1185 ALUTs, achieving a latency of 157 ns. The maximum clock frequency is 173.49 MHz. I.
Low Precision Table Based Complex Reciprocal Approximation
"... Abstract—A recently proposed complex valued division algorithm[1] designed for efficient hardware implementations requires a prescaling step by a constant factor. Techniques for obtaining this prescaling factor have been mentioned by the authors, which serves to justify the feasibility of the algori ..."
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Abstract—A recently proposed complex valued division algorithm[1] designed for efficient hardware implementations requires a prescaling step by a constant factor. Techniques for obtaining this prescaling factor have been mentioned by the authors, which serves to justify the feasibility of the algorithm but is inadequate for obtaining efficient implementations. Table based solutions are formulated in this paper for obtaining the prescaling factor, a low precision reciprocal approximation for a complex value, using techniques adopted from univariate function approximations. Two separate designs are proposed, one using a single table (a reference design) and another using generalized multipartite tables. The main contribution of this work is the extension of generalized multipartite table methods to a function of two variables. The multipartite tables derived were up to 67% more memory efficient than their single table counterparts. I.
Variable Radix Real and Complex DigitRecurrence Division
"... We propose a digitrecurrence algorithm for division in real and complex number domains using a variable radix. The objective of the approach is to simplify the prescaling of the operands by using a suitable low radix, and switch to higher radices in the remaining iterations to reduce their number. ..."
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We propose a digitrecurrence algorithm for division in real and complex number domains using a variable radix. The objective of the approach is to simplify the prescaling of the operands by using a suitable low radix, and switch to higher radices in the remaining iterations to reduce their number. The prescaling is used to allow a simple quotientdigit selection by rounding of the residual. We discuss the algorithm, its implementation, and estimate its time and cost characteristics with respect to fixed highradix division algorithms. 1
Complex MultiplyAdd and Other Related Operators
"... In this work we present algorithms and schemes for computing several common arithmetic expressions defined in the complex domain as hardwareimplemented operators. The operators include Complex MultiplyAdd ..."
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In this work we present algorithms and schemes for computing several common arithmetic expressions defined in the complex domain as hardwareimplemented operators. The operators include Complex MultiplyAdd