Abstract — This paper presents a patterned ground shield inserted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1–2 GHz, the addition of the shield increases the inductor quality factor up to 33 % and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz vg tank can be nearly doubled with a shielded inductor. Index Terms — Inductor, inductor model, patterned ground shield, quality factor, self-resonance, substrate loss, substrate noise coupling. I.

Abstract—This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance. Index Terms—Eddy currents, inductor model, on-chip inductors, quality factor, self resonance, substrate loss. I.

The current status of lithium-niobate external-modulator technology is reviewed with emphasis on design, fabrication, system requirements, performance, and reliability. The technology meets the performance and reliability requirements of current 2.5-, 10-, and 40-Gb/s digital communication systems, as well as CATV analog systems. The current trend in device topology is toward higher data rates and increased levels of integration. In particular, multiple high-speed modulation functions, such as 10-Gb/s return-to-zero pulse generation plus data modulation, have been achieved in a single device.

Abstract — This paper discusses the frequency to extract RLC values from interconnects. The frequency used for RLC extraction affects the accuracy of interconnect characterization, and hence careful determination of extraction frequency is crucial. We propose a representative frequency for RLC extraction based on the interconnect length. We show that the proposed method enables accurate analysis of the waveform at the far-end of interconnects. We verify that the extraction at the proposed frequency provides the most accurate transition waveform against various input signals and interconnect structures in digital circuits. I.

Abstract- A new approximation technique to find the total series impedance per unit length for quasi-TEM transmission lines including conductor loss has been developed. It is shown through the use of conformal mapping that both frequency dependent skin-depth and proximity effects can be accurately modeled. Comparison between experimental measurements and calculations for twin-lead, coplanar strips, parallel square bars, and coplanar waveguide all show excellent agreement. This technique is easily generalized to any transmission line making use of polygonal cross-section conductors. I.

The Schwarz--Christoffel toolbox, a free MATLAB package for the computation of conformal maps, is applied to the quasi-static analysis of coplanar waveguides (CPWs) of arbitrary cross section in order to provide computationally efficient and very accurate estimates of their capacitance, inductance, characteristic impedance, and skin-effect attenuation. A few examples of many-sided polygonal waveguides are discussed, and the trapezoidal CPW, important, for example, for electrooptic modulators, is described in full detail, providing general guidelines for the electrode geometry optimization. The technique is validated through a comparison with the results of a full-wave finite-element method, and excellent agreement is demonstrated both in vacuo and with two-layer dielectric substrates.

Abstract—This paper proposes a simulation-based modeling methodology that provides greater flexibility in the design and layout of millimeter-wave CMOS circuits than measurementbased models do. A physical model for the metallization capacitances of the transistors is described and new layout techniques are introduced that exploit these capacitances to improve the circuit performance. The accuracy of the models is verified by the design and measurement of five oscillators operating in the range of 40 GHz to 130 GHz in 90-nm CMOS technology. Index Terms—High-frequency MOS models, inductor models, interconnect models, millimeter-wave circuit design, millimeterwave layout techniques, MOS device capacitances. Fig. 1. Generic transceiver front end.

Abstract—On-chip conductors such as clock- and power-distribution networks require accurately modeling skin and proximity effects. Furthermore, to incorporate skin and proximity effects in the existing generic simulation tools such as SPICE, simple-frequency independent–lumped element-circuit models are needed. A rule based RL circuit model is proposed in this paper that is realizable and predicts skin and proximity effects accurately in the frequency range of interest. With this circuit model, wires are characterized by a few parallel branches of resistors and inductors while proximity effect is captured by mutual inductance between inductors in different RL circuits. Index Terms—Proximity effect, , simulation, skin effect. I.

Abstract: In the design of a parallel resonant induction heating system, choosing a proper capacitance for the resonant circuit is quite important. The capacitance affects the resonant frequency, output power, Q-factor, heating efficiency and power factor. In this paper, the important role of equivalent series resistance (ESR) in the choice of capacitance is recognized. Without the effort of reducing temperature rise of the capacitor, the life time of capacitor tends to decrease rapidly. This paper, therefore, presents a method of finding an optimal value of the capacitor under voltage constraint for maximizing the output power of an induction heater, while minimizing the power loss of the capacitor at the same time. Based on the equivalent circuit model of an induction heating system, the output power, and the capacitor losses are calculated. The voltage constraint comes from the voltage ratings of the capacitor bank and the switching devices of the inverter. The effectiveness of the proposed method is verified by simulations and experiments.

This paper presents a physical model for planar spiral inductors on silicon. The model has been confirmed with measured and published data of inductors having different geometric and process parameters. This model is scalable with inductor geometry, allowing designers to predict and optimize the quality factor. INTRODUCTION Interest in monolithic spiral inductors has surged with recent growing demand for Si-based RF communication circuits [1]. Although promising experimental results [2][3] have been reported, basic understanding of the performance limitations and procedures for optimizing the quality factor, Q, are lacking. A scalable physical model that can accurately predict the behavior of inductors with different structural parameters over a broad range of frequency would be a valuable RF IC design tool. Each element of the model should be consistent with the physical phenomena occurring in the part of the structure it represents. In particular, the physical model should account...