. We describe a novel technique for code selection based on data-flow graphs, which arise naturally in the domain of digital signal processing. Code selection is the optimized mapping of abstract operations to partial machine instructions. The presented method performs an important task within the retargetable microcode generator CBC, which was designed to cope with the requirements arising in the context of custom digital signal processor (DSP) programming. The algorithm exploits a graph representation in which control-flow is modeled by scopes. 1 Introduction In the domain of medium-throughput digital signal processing, micro-programmable processor cores are frequently chosen for system realization. By adding dedicated hardware (accelerator paths), these cores are tailored to the needs of new applications. Optimized processor modules can be reused, which is a major benefit compared to high-level synthesis [28] where a completely new design is developed for each application. ...

Code generation influences the efficiency of not only the compiled program but also the compilation process. The appearence of the many new processors has created the need of automating the code generation phase. The instruction selection is a important component to be poduced automatically in the code generation phase. The tools for automating the instruction selection usually use the tree-structure to represent the intermediate representation. The algorithms to manipulate the tree structure are simple. And the powerful tree rewriting tools can be automatically generated for transforming trees to target machine code. Among many technologies for the aumatic generation, BURS technology produces the fastest code generators. But, BURS technology often require long time and much space to process a complex machine description. Much efforts has gone to make BURS technology more attractive: efficient in points of time and space. In this proposal, we closely inspect BURS technology and propose...