The various arguments for introducing optical interconnections to silicon CMOS chips are summarized, and the challenges for optical, optoelectronic, and integration technologies are discussed. Optics could solve many physical problems of interconnects, including precise clock distribution, system synchronization (allowing larger synchronous zones, both on-chip and between chips), bandwidth and density of long interconnections, and reduction of power dissipation. Optics may relieve a broad range of design problems, such as crosstalk, voltage isolation, wave reflection, impedance matching, and pin inductance. It may allow continued scaling of existing architectures and enable novel highly interconnected or high-bandwidth architectures. No physical breakthrough is required to implement dense optical interconnects to silicon chips, though substantial technological work remains. Cost is a significant barrier to practical introduction, though revolutionary approaches exist that might achieve economies of scale. An Appendix analyzes scaling of on-chip global electrical interconnects, including line inductance and the skin effect, both of which impose significant additional constraints on future interconnects. Keywords—Off-chip wiring, on-chip wiring, optical interconnects, quantum-well modulator, vertical-cavity surface-emitting laser. I.

Technologies now exist for implementing dense surface-normal optical interconnections for silicon CMOS VLSI using hybrid integration techniques. The critical factors in determining the performance of the resulting photonic chip are the yield on the transceiver device arrays, the sensitivity and power dissipation of the receiver and transmitter circuits, and the total optical power budget available. The use of GaAs--AlGaAs multiple-quantum-well p-i-n diodes for on-chip detection and modulation is one effective means of implementing the optoelectronic transceivers. We discuss a potential roadmap for the scaling of this hybrid optoelectronic VLSI technology as CMOS linewidths shrink and the characteristics of the hybrid optoelectronic tranceiver technology improve. An important general conclusion is that, unlike electrical interconnects, such dense optical interconnections directly to an electronic circuit will likely be able to scale in capacity to match the improved performance of futur...

Abstract — We examine the current performance and future demands of interconnects to and on silicon chips. We compare electrical and optical interconnects and project the requirements for optoelectronic and optical devices if optics is to solve the major problems of interconnects to future high performance silicon chips. Optics has potential benefits in interconnect density, energy and timing. The necessity of low interconnect energy imposes low limits especially on the energy of the optical output devices, with a ~ 10 fJ/bit device energy target emerging. Some optical modulators and radical laser approaches may meet this requirement. Low (e.g., a few fF or less) photodetector capacitance is important. Very compact wavelength splitters are essential for connecting the information to fibers. Dense waveguides are necessary on-chip or on boards for guided wave optical approaches, especially if very high clock rates or dense WDM are to be avoided. Free space optics potentially can handle the necessary bandwidths even without fast clocks or WDM. With such technology, however, optics may enable the continued scaling of interconnect capacity required by future chips. Index Terms—ITRS roadmap, optical interconnections, optical modulators O I.

Reconfigurable interconnection networks for distributed shared memory machines exploit properties of the workload dynamics that are not easily captured by statistical traffic models. Therefore, when designing such a network, one should make trade-offs based on full-system simulation for all viable workloads. It is however very time-consuming to do such simulations. In this paper, we present a technique that can predict the performance of a machine for different network parameters, based on the results of only one full simulation run. We also define confidence intervals for our prediction, and analyze the impact of several assumptions that were made.

New advances in reconfigurable optical interconnect technologies will allow the fabrication of cheap, fast and run-time adaptable networks for connecting processors and memory modules in large shared-memory multiprocessor machines. Since, in some technologies, the switching times of these components are high compared to the memory access time, reconfiguration can only take place on a time scale significantly above individual memory accesses. In this paper, we present preliminary results of our investigation into the exploitability of the space and time locality of address streams by a reconfigurable network. 1.

The completed detailed design and initial phases of construction of an optoelectronic crossbar demonstrator are presented. The experimental system uses hybrid very large scale integrated optoelectronics technology whereby InGaAs-based detectors and modulators are flip-chip bonded onto silicon integrated circuits. The system aims to demonstrate (a 1-Tb/s aggregate data input/output to a single chip by means of freespace optics.

A new model for dielectric loss, suitable for time domain modeling of printed circuit boards, is proposed. The model is based on a physical relaxation model. Complete time domain modeling of skin effect and dielectric losses in FR-4 boards are demonstrated and experimentally verified. Finally, the developed model is used to predict that FR-4 boards are useful for data rates up to 10 Gb/s. Index terms.

...................................................................................................................................... viii List of publications .......................................................................................................................ix Chapter 1: Introduction..................................................................................................................1 1.1 Scope and overall research contribution..............................................................................1 1.2 Motivation............................................................................................................................2 1.2.1 The interconnect problem .............................................................................................2 1.2.2 Capabilities and limitations of electrical interconnects................................................4 1.2.3 Advantages of optical interconnects ......................................

Abstract. Rent's rule and related concepts of connectivity such asdimensionality, line-length distributions, and separators have found great use in fundamental studies of di erent interconnection media, including superconductors and optics, as well as the study of optoelectronic computing systems. In this paper generalizations for systems for which the Rent exponent is not constan tthroughout the interconnection hierarchy are pro vided. The origin of Rent's rule is stressed as resulting from the embedding of a high-dimensional information ow graph to two- or three-dimensional physical space. The applicability of these traditionally solid-wire-based concepts to free-space optically interconnected systems is discussed. 1 Connectivity,Dimensionality,and Rent's Rule The importance of wiring models has long been recognized and they have been used not only for design purposes but also for the fundamental study of interconnections and communication in computing. A central and ubiquitous concept

Abstract — New advances in reconfigurable optical interconnect technologies will allow the fabrication of cheap, fast and run-time adaptable networks for connecting processors and memory modules in large shared-memory multiprocessor machines. Since the switching times of these components are typically high compared to the memory access time, reconfiguration can only take place on a time scale significantly above individual memory accesses. In this paper, we present preliminary results of our investigation into the exploitability of the space and time locality of address streams by a reconfigurable network.