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42
A 1.8V digitalaudio sigmadelta modulator in 0.8µm CMOS
 IEEE Journal of SolidState Circuits
, 1997
"... Abstract — Oversampling techniques based on sigmadelta (ΣΔ) modulation offer numerous advantages for the realization of highresolution analogtodigital (A/D) converters in a lowvoltage environment. This paper examines the design and implementation of a CMOS ΣΔ modulator for digitalaudio A/D con ..."
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Abstract — Oversampling techniques based on sigmadelta (ΣΔ) modulation offer numerous advantages for the realization of highresolution analogtodigital (A/D) converters in a lowvoltage environment. This paper examines the design and implementation of a CMOS ΣΔ modulator for digitalaudio A/D conversion that operates from a single 1.8V power supply. A cascaded modulator that maintains a large fullscale input range while avoiding signal clipping at internal nodes is introduced. The experimental modulator has been designed with fullydifferential switchedcapacitor integrators employing different input and output commonmode levels and boosted clock drivers in order to facilitate low voltage operation. Precise control of commonmode levels, high power supply noise rejection, and low power dissipation are obtained through the use of twostage, class A/AB operational amplifiers. At a sampling rate of 4 MHz and an oversampling ratio of 80, an implementation of the modulator in a 0.8μm CMOS technology with metaltopolycide capacitors and NMOS and PMOS threshold voltages of +0.65V and –0.75V, respectively, achieves a dynamic range of 99 dB at a Nyquist conversion rate of 50 kHz. The modulator can operate from supply voltages ranging from 1.5 V to 2.5 V, occupies an active area of 1.5 mm 2, and dissipates 2.5 mW from a 1.8V supply.
TimeInterleaved Oversampling A/D Converters: Theory and Practice
 IEEE Trans. Circuits Syst. II
, 1997
"... In this paper, the design procedure and practical issues regarding the realization of timeinterleaved oversampling converters are presented. Using the concept of block digital filtering, it is shown that arbitrary 16 topologies can be converted into corresponding timeinterleaved structures. Prac ..."
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Cited by 14 (3 self)
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In this paper, the design procedure and practical issues regarding the realization of timeinterleaved oversampling converters are presented. Using the concept of block digital filtering, it is shown that arbitrary 16 topologies can be converted into corresponding timeinterleaved structures. Practical issues such as finite opamp gain, mismatching, and dc offsets are addressed, analyzed, and practical solutions to overcome some of these problems are discussed. To verify the theoretical results, a discretecomponent prototype of a secondorder timeinterleaved 16 analog/digital (A/D) converter has been implemented and the design details as well as experimental results are presented. Index TermsConverters, timeinterleaved, oversampling. I. INTRODUCTION O VERSAMPLING converters have become a popular technique for data conversion [1]. One reason for their popularity is their outstanding linearity which comes from the fact that they usually exploit a 1b quantizer. Even with a tr...
A Design Strategy for LowVoltage LowPower ContinuousTime Σ
 A/D Converters. Design, Automation and Test in Europe
, 2001
"... This paper presents a design strategy for lowvoltage lowpower ¦ ¡ analogtodigital (A/D) converter using a continuoustime (CT) lowpass loopfilter. An improved method is used to find the optimal ¦ ¡ modulator implementation with respect to a minimal power consumption on the one hand and to fulfil ..."
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This paper presents a design strategy for lowvoltage lowpower ¦ ¡ analogtodigital (A/D) converter using a continuoustime (CT) lowpass loopfilter. An improved method is used to find the optimal ¦ ¡ modulator implementation with respect to a minimal power consumption on the one hand and to fulfil a rapid prototyping approach on the other hand. The influence of the low supply voltage as well as circuit nonidealities on the overall ¦ ¡ modulator is determined and verified by behavioral simulations. Transistorlevel simulation results of a � � Î CT ¦ ¡ A/D converter show a 75 dB dynamic range in a bandwidth of ��ÀÞ. 1.
On Incremental SigmaDelta Modulation with Optimal Filtering
 ACCEPTED FOR PUBLICATION TCASI
, 2005
"... The paper presents a quantizationtheoretic framework for studying incremental Σ∆ quantization systems. The framework makes it possible to efficiently compute the quantization intervals and hence the transfer function of the quantizer, and to determine the mean square error (MSE) and maximum error f ..."
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The paper presents a quantizationtheoretic framework for studying incremental Σ∆ quantization systems. The framework makes it possible to efficiently compute the quantization intervals and hence the transfer function of the quantizer, and to determine the mean square error (MSE) and maximum error for the optimal and conventional linear filters for first and second order incremental Σ∆ modulators. The results show that the optimal filter can significantly outperform conventional linear filters in terms of both MSE and maximum error. The performance of conventional Σ∆ quantizers is then compared to that of incremental Σ∆ with optimal filtering for bandlimited signals. It is shown that incremental Σ∆ can outperform the conventional approach in terms of signal to noise+distortion ratio (SNDR) and the characteristics of the power spectral density (PSD). The framework is also used to provide a simpler and more intuitive derivation of the Zoomer algorithm.
0 Systematic Approach for Scaling Coefficients of DiscreteTime and ContinuousTime SigmaDelta Modulators
"... —In this paper we present a systematic method to scale the integrators output swings of modulator. It is shown that this scaling method preserves both the Noise Transfer Function and the Signal Transfer Function of the modulator. Examples are given to illustrate the effectiveness of the proposed met ..."
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Cited by 3 (3 self)
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—In this paper we present a systematic method to scale the integrators output swings of modulator. It is shown that this scaling method preserves both the Noise Transfer Function and the Signal Transfer Function of the modulator. Examples are given to illustrate the effectiveness of the proposed method to alleviate circuit nonidealities.
A Low Oversampling Ratio 14b 500kHz ADC with a SelfCalibrated Multibit DAC
 IEEE J. SolidState Circuits
, 1996
"... Abstract — Deltasigma (16) analogtodigital converters (ADC’s) rely on oversampling to achieve highresolution. By applying multibit quantization to overcom stability limitations, a circuit topology with greatly reduced oversampling requirements is developed. A 14bit 500kHz 16 ADC is described t ..."
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Abstract — Deltasigma (16) analogtodigital converters (ADC’s) rely on oversampling to achieve highresolution. By applying multibit quantization to overcom stability limitations, a circuit topology with greatly reduced oversampling requirements is developed. A 14bit 500kHz 16 ADC is described that uses an oversampling ratio of only 16. A fourthorder embedded modulator, fourbit quantizer, and selfcalibrated digitaltoanalog converter (DAC) are used to achieve this performance. Although the highorder embedded architecture was previously thought to be unstable, it is shown that with proper design, a robust system can be obtained. Circuit design and implementation in a 1.2"m CMOS process are presented. Experimental results give a dynamic range of 84 dB with a sampling rate of 8 MHz and oversampling ratio of 16. This is the lowest oversampling ratio for this resolution and bandwidth achieved to date. I.
A doublesampling extendedcounting ADC
 IEEE J. SolidState Circuits
, 2004
"... Abstract—Extendedcounting analogtodigital conversion combines the accuracy of 61 modulation with the speed of algorithmic conversion. In this paper, a doublesampling technique is introduced for this type of converter. It is based on a variant of the fully floating bilinear integrator. This way, ..."
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Abstract—Extendedcounting analogtodigital conversion combines the accuracy of 61 modulation with the speed of algorithmic conversion. In this paper, a doublesampling technique is introduced for this type of converter. It is based on a variant of the fully floating bilinear integrator. This way, the clock frequency of the converter is almost halved. An experimental converter was designed in a 0.6 m CMOS technology for a bandwidth of 500 kHz at a 3.3V supply. In the switchedcapacitor implementation, the hardware is extensively reused. This way, the converter can be realized with only one operational amplifier. On the other hand, compared to alternative implementations, the amount of switches is increased. These are designed carefully in order not to degrade the performance. The converter converts a sample in 24 clock cycles and achieves a dynamic range of 87 dB. The peak signaltonoise ratio (SNR) and signaltonoiseplusdistortion ratio (SNDR) were measured to be 82 and 81 dB, respectively. The power consumption was 28mW analog and 20mW digital. The converter core occupies 0.7 mmP including digital logic. Index Terms—Analogtodigital conversion, double sampling, extended counting. I.
A NyquistRate DeltaSigma A/D Converter
 IEEE J. SolidState Circuits
, 1998
"... This paper describes an analogtodigital converter which combines multiple deltasigma modulators in parallel so that time oversampling may be reduced or even eliminated. By doubling the number of Lthorder deltasigma modulators, the resolution of this architecture is increased by approximatel ..."
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This paper describes an analogtodigital converter which combines multiple deltasigma modulators in parallel so that time oversampling may be reduced or even eliminated. By doubling the number of Lthorder deltasigma modulators, the resolution of this architecture is increased by approximately L bits. Thus, the resolution obtained by combining M deltasigma modulators in parallel with no oversampling is similar to operating the same modulator with an oversampling rate of M.A parallel deltasigma A/D converter implementation composed of two, four, and eight secondorder deltasigma modulators is described that does not require oversampling. Using this prototype, the design issues of the parallel deltasigma A/D converter are explored and the theoretical performance with no oversampling and with low oversampling is verified. This architecture shows promise for obtaining high speed and resolution conversion since it retains much of the insensitivity to nonideal circuit beh...
Analysis and Design of MultipleBit HighOrder \Sigma\Delta Modulator
 566 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 50, NO. 9, SEPTEMBER 2003 [13
, 1997
"... The highorder \Sigma\Delta modulator is an appropriate approach for highbandwidth, highresolution A/D conversion. However, nonideal effects such as the finite opamp gain and the capacitor mismatch have great impacts on its performance at a low oversampling ratio. To achieve greater performance ..."
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The highorder \Sigma\Delta modulator is an appropriate approach for highbandwidth, highresolution A/D conversion. However, nonideal effects such as the finite opamp gain and the capacitor mismatch have great impacts on its performance at a low oversampling ratio. To achieve greater performance under the inevitable nonideal effects, we explore several multiplebit schemes, based on our CIQE highorder \Sigma\Delta architecture, to remove the nonideal deterioration. Design rules of these multiplebit schemes are developed and verified by extensive simulations. I. Introduction The A/D converter is an important element for digitalsignal processing systems. The cruxes of an A/D converter are high resolution for precise representation of the original signal and high bandwidth for fast processing. Conventional A/D architectures, e.g., flash, 2step flash, and successive approximation, are not suitable for highresolution applications because of the need of nearideal analog component...
A Low Oversampling Ratio 14b 500kHz ΔΣ ADC with a SelfCalibrated Multibit DAC
"... Deltasigma (\Delta\Sigma) analogtodigital converters rely on oversampling technique to achieve highresolution. By overcoming stability limitations and applying multibit quantization, a circuit topology with greatly reduced oversampling requirements is developed. A 14bit 500 kHz deltasigma ADC ..."
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Deltasigma (\Delta\Sigma) analogtodigital converters rely on oversampling technique to achieve highresolution. By overcoming stability limitations and applying multibit quantization, a circuit topology with greatly reduced oversampling requirements is developed. A 14bit 500 kHz deltasigma ADC is described that uses an oversampling ratio of only 16. A fourthorder embedded modulator, fourbit quantizer, and selfcalibrated DAC are used to achieve this performance. Although the highorder embedded architecture was previously thought to be unstable, it is shown that with proper design a robust system can be obtained. Circuit design and implementation in a 1.2¯m CMOS process are presented. Experimental results give a dynamic range of 84 dB with a sampling rate of 8 MHz and oversampling ratio of 16. This is the lowest oversampling ratio for this resolution and bandwidth achieved to date. 1 Introduction Deltasigma (\Delta\Sigma) analogtodigital converters are well suited for low f...