In this paper, we present an implementation of a vectorizing C compiler for Intel's MMX (Multimedia Extension). This compiler would identify data parallel sections of the code using scalar and array dependence analysis. To enhance the scope for application of the subword semantics, our compiler performs several code transformations. These include strip mining, scalar expansion, grouping and reduction, loop ssion and distribution. Thereafter inline assembly instructions corresponding to the data parallel sections are generated. We have used the Stanford University Intermediate Format (SUIF), a public domain compiler tool, for our implementation. We evaluated the performance of the code generated by our compiler for a number of benchmarks. Initial performance results reveal that our compiler generated code produces a reasonable performance improvement (speedup of 2 to 6.5) over the the code generated without the vectorizing transformations/inline assembly. In certain cases, t...

: Computing Fast Fourier Transforms (FFTs) are notoriously dicult on conventional general-purpose architectures because FFTs require high memory bandwidth and strided memory accesses. Since FFTs are important in signal processing, several DSPs have hardware support for doing FFTs, some of which are designed solely for the purpose of computing FFTs and related transforms. In this paper, we show that the general-purpose VIRAM processor's performance exceeds that of existing DSPs for computing oating point FFTs and is competitive with the performance of the specialized xed-point FFT chips. VIRAM is a complete \system on a chip," and therefore has power, area, and cost advantages over multi-chip systems based on DSPs. The key to achieving these results are: an integrated processor-in-memory design for VIRAM that provides high memory bandwith; vector processing which provides simple and ecient utilization of the high memory bandwidth; a small amount of ISA support for in-register permutat...

In this paper we develop an optimized algorithm for performing the Fast Fourier Transform (FFT) on the Vector IRAM (VIRAM) architecture in both the fixed- and floating-point domains. We discuss the impact of various optimizations on the performance of the FFT algorithm on VIRAM, including both an analysis of the usefulness of various VIRAM ISA features as well as a consideration of the performance and accuracy consequences of performing the FFT computations in the fixed-point domain rather than the traditional floating-point domain.

is dedicated To the memory of my parents, Eleanor and James Haritos, and To my wonderful and supportive son,