Results 1  10
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15
Support Vector Machines for Analog Circuit Performance Representation
 in Proceedings of DAC
, 2003
"... The use of Support Vector Machines (SVMs) to represent the performance space of analog circuits is explored. In abstract terms, an analog circuit maps a set of input design parameters to a set of performance figures. This function is usually evaluated through simulations and its range defines the fe ..."
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Cited by 19 (6 self)
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The use of Support Vector Machines (SVMs) to represent the performance space of analog circuits is explored. In abstract terms, an analog circuit maps a set of input design parameters to a set of performance figures. This function is usually evaluated through simulations and its range defines the feasible performance space of the circuit. In this paper, we directly model performance spaces as mathematical relations. We study approximation approaches based on twoclass and oneclass SVMs, the latter providing a better tradeoff between accuracy and complexity avoiding "curse of dimensionality" issues with 2class SVMs. We propose two improvements of the basic oneclass SVM performances: conformal mapping and active learning. Finally we develop an efficient algorithm to compute projections, so that topdown methodologies can be easily supported.
Convexitybased Algorithms for Design Centering
 IN PROCEEDINGS OF THE IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTERAIDED DESIGN
, 1993
"... A new technique for design centering, and for polytope approximation of the feasible region for a design are presented. In the first phase, the feasible region is approximated by a convex polytope, using a method based on a theorem on convex sets. As a natural consequence of this approach, a good ap ..."
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Cited by 7 (4 self)
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A new technique for design centering, and for polytope approximation of the feasible region for a design are presented. In the first phase, the feasible region is approximated by a convex polytope, using a method based on a theorem on convex sets. As a natural consequence of this approach, a good approximation to the design center is obtained. In the next phase, the exact design center is estimated using one of two techniques that we present in this paper. The first inscribes the largest Hessian ellipsoid, which is known to be a good approximation to the shape of the polytope, within the polytope. This represents an improvement over previous methods, such as simplicial approximation, where a hypersphere or a crudely estimated ellipsoid is inscribed within the approximating polytope. However, when the pdf's of the design parameters are known, the design center does not necessarily correspond to the center of the largest inscribed ellipsoid. Hence, a second technique is developed, which incorporates the probability distributions of the parameters, under the assumption that their variation is modeled by Gaussian probability distributions. The problem is formulated as a convex programming problem and an efficient algorithm is used to calculate the design center, using fast and e#cient Monte Carlo methods to estimate the yield gradient. An example is provided to illustrate how ellipsoidbased methods fail to incorporate the probability density functions, and is solved using the convex programmingbased algorithm.
Simulating the impact of patterndependent polyCD variation on circuit performance
 Proc. IEEE Vol. 11 #4, Transactions on Semiconductor Manufacturing
, 1998
"... Abstractâ€”In this paper, we present a methodology for simulating the impact of withindie (dielevel) polysilicon critical dimension (polyCD) variation on circuit performance. The methodology is illustrated on a 0.25 "m 642 8 SRAM macrocell layout. For this example, the impact as measured throu ..."
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Cited by 6 (1 self)
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Abstractâ€”In this paper, we present a methodology for simulating the impact of withindie (dielevel) polysilicon critical dimension (polyCD) variation on circuit performance. The methodology is illustrated on a 0.25 "m 642 8 SRAM macrocell layout. For this example, the impact as measured through signal skew is found to be significant and strongly dependent on the input address of the SRAM cell. I.
Initial sizing of analog integrated circuits by centering within topologygiven implicit specifications
 IEEE ICCAD
, 2003
"... We present a novel technique to automatically calculate an initial sizing of analog circuits that conforms to good design practice. The method is purely (DC) simulationbased and does not need symbolic design equations or user design knowledge. It identifies the space of feasible design parameters b ..."
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Cited by 4 (2 self)
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We present a novel technique to automatically calculate an initial sizing of analog circuits that conforms to good design practice. The method is purely (DC) simulationbased and does not need symbolic design equations or user design knowledge. It identifies the space of feasible design parameters based on implicit specifications, which arise from the circuit topology. A sizing centered within this space is obtained by iteratively solving a maximum volume ellipsoid problem on approximations to the feasible parameter space. The result is wellsuited as initial sizing because it safely satisfies all implicit specifications. Experimental results demonstrate the efficiency and reliability of our method. 1.
DORIC: Design of Optimal Robust Integrated Circuits
 in Proc. IEEE CICC
, 1993
"... An interactive IC design methodology aimed at making designs less sensitive to manufacturing variations is presented, as well as a CAD tool to support it. The methodology, based on Taguchi's Robust Design Method, is shown to improve the performance and robustness of basic analog circuits. 1.0 Introd ..."
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Cited by 3 (0 self)
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An interactive IC design methodology aimed at making designs less sensitive to manufacturing variations is presented, as well as a CAD tool to support it. The methodology, based on Taguchi's Robust Design Method, is shown to improve the performance and robustness of basic analog circuits. 1.0 Introduction The Robust Design Method is a technique aimed at designing high quality products at low cost. It is based on optimizing performance, manufacturability and cost by varying certain decision variables, in order to make the product less sensitive to manufacturing imperfections. Previously, IC variations were studied either in an ad hoc fashion or with a large number of simulations, which often led to long and expensive design cycles. Using a mathematical tool called orthogonal arrays, the Robust Design Method explores many variables in a small number of trials. The developed computeraided design tool, DORIC (Design of Optimal & Robust Integrated Circuits) allows the user to study the e...
An E cient Statistical Analysis Methodology and Its Application to HighDensity DRAMs
"... In this work, a new approach for the statistical worst case of fullchip circuit performance and parametric yield prediction, using both the Modi edPrincipal Component Analysis (MPCA) and the Gradient Method (GM), is proposed and veri ed. This method enables designers not only to predict the standa ..."
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Cited by 1 (0 self)
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In this work, a new approach for the statistical worst case of fullchip circuit performance and parametric yield prediction, using both the Modi edPrincipal Component Analysis (MPCA) and the Gradient Method (GM), is proposed and veri ed. This method enables designers not only to predict the standard deviations of circuit performances but also track the circuit performances associated with the process shift using wafer test structure measurements. This new method is validated experimentally during the development and production of high density DRAMs. 1
Feasible Region Approximation Using Convex Polytopes
"... A new technique for polytope approximation of the feasible region for a design is presented. This method is computationally less expensive than the simplicial approximation method #1#. Results on several circuits are presented, and it is shown that the qualityofthe polytope approximation is substan ..."
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Cited by 1 (1 self)
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A new technique for polytope approximation of the feasible region for a design is presented. This method is computationally less expensive than the simplicial approximation method #1#. Results on several circuits are presented, and it is shown that the qualityofthe polytope approximation is substantially better than an ellipsoidal approximation.
Submitted to IEEE Transactions on Circuits and Systems in July 2003
"... In this paper, we formulate a new type of Monte Carlo problem for circuits. Specific results are given for the class of resistive networks and open research problems are indicated for more general cases. Given lower and upper bounds on the value of each resistor but no probability distribution, w ..."
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In this paper, we formulate a new type of Monte Carlo problem for circuits. Specific results are given for the class of resistive networks and open research problems are indicated for more general cases. Given lower and upper bounds on the value of each resistor but no probability distribution, we consider the problem of estimating appropriate probabilistic measures of performance. In view of the fact that no a priori probability distributions for the uncertain resistors are assumed, a certain type "distributional robustness" is sought. To this end, a new paradigm from the robustness literature is particularized to these circuits. Some of the performance bounds obtained via this new approach di#er considerably from those which result from a more conventional Monte Carlo simulation.
Proceedings Of Iscas, Geneva, 2000
, 2000
"... In this paper, we formulate and solve a new type of Monte Carlo problem for a resistive network. Given lower and upper bounds on the value of each resistor but no probability distribution, we consider the problem of finding the expected value for a designated gain. In view of the fact that no aprior ..."
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In this paper, we formulate and solve a new type of Monte Carlo problem for a resistive network. Given lower and upper bounds on the value of each resistor but no probability distribution, we consider the problem of finding the expected value for a designated gain. In view of the fact that no apriori probability distributions for the uncertain resistors are assumed, a certain type "distributional robustness" is sought. To this end, a new paradigm from the robustness literature is particularized to circuits and results are provided in this context. Some of the performance bounds obtained via this new approach differ considerably from those which result from a more conventional Monte Carlo simulation.
An Efficient Statistical Analysis Methodology and Its Application to HighDensity DRAMs
, 1997
"... In this work, a new approach for the statistical worst case of fullchip circuit performance and parametric yield prediction, using both the ModifiedPrincipal Component Analysis (MPCA) and the Gradient Method (GM), is proposed and verified. This method enables designers not only to predict the stan ..."
Abstract
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In this work, a new approach for the statistical worst case of fullchip circuit performance and parametric yield prediction, using both the ModifiedPrincipal Component Analysis (MPCA) and the Gradient Method (GM), is proposed and verified. This method enables designers not only to predict the standard deviations of circuit performances but also track the circuit performances associated with the process shift using wafer test structure measurements. This new method is validated experimentally during the development and production of high density DRAMs.