Conventional algorithms to implement an Operating System timer module take O(n) time to start or maintain a timer, where n is the number of outstanding timers: this is expensive for large n. This paper shows that by using a circular buffer or timing wheel, it takes O(1) time to start, stop, and maintain timers within the range of the wheel. Two extensions for larger values of the interval are described. In the first, the timer interval is hashed into a slot on the timing wheel. In the second, a hierarchy of timing wheels with different granularities is used to span a greater range of intervals. The performance of these two schemes and various implementation tradeoffs are discussed. We have used one of our schemes to replace the current BSD UNIX callout and timer facilities. Our new implementation can support thousands of outstanding timers without much overhead. Our timer schemes have also been implemented in other operating systems and network protocol packages. 1 Introduction In a ...

a language for writing parallel programs. The compiler generates code for distributed-memory machines consisting of interconnected workstations or servers powered by Digital’s Alpha microprocessors. The DEC Fortran 90 compiler efficiently implements the features of Fortran 90 and HPF that support parallelism. HPF programs compiled with Digital’s compiler yield performance that scales linearly or even superlinearly on significant applications on both distributedmemory and shared-memory architectures.

this paper, we present an overview ofPSE version 1.0 and explain why it was designed and selected for use with HPF programs. We then discuss cluster definition and management, describe the PSE application model, and discussPSE's message-passing communication options, including an optimized transport for message passing. We conclude with our performance results.

Irregular networks connected by wormhole-routed switches are becoming increasingly popular for building networks of workstations for cost-effective parallel processing. A primary strategy to achieve deadlock-free routing in such networks is to first configure the links in a network into some specific directions, and then prohibit the turns that a message may traverse. A routing algorithm imposes fewer turn prohibitions will have a higher adaptively and thus a higher performance. In general, designing such a routing algorithm requires two basic components: (1) assigning link directions, and (2) determining a link-direction-based routing guideline. In this paper we examine various assignment rules and routing guidelines, from which different heuristics and criteria are proposed to construct a good routing algorithm. Their effectiveness in reducing turn prohibitions is investigated, and in most cases the minimum turn prohibitions can be achieved. For a connected network with N switches and M links, the complexity of finding the set of turn prohibitions using our proposed method is O(N × M).