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Automated Synthesis of Analog Electrical Circuits by Means of Genetic Programming
, 1997
"... The design (synthesis) of analog electrical circuits starts with a highlevel statement of the circuit's desired behavior and requires creating a circuit that satisfies the specified design goals. Analog circuit synthesis entails the creation of both the topology and the sizing (numerical values) of ..."
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Cited by 64 (8 self)
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The design (synthesis) of analog electrical circuits starts with a highlevel statement of the circuit's desired behavior and requires creating a circuit that satisfies the specified design goals. Analog circuit synthesis entails the creation of both the topology and the sizing (numerical values) of all of the circuit's components. The difficulty of the problem of analog circuit synthesis is well known and there is no previously known general automated technique for synthesizing an analog circuit from a highlevel statement of the circuit's desired behavior. This paper presents a single uniform approach using genetic programming for the automatic synthesis of both the topology and sizing of a suite of eight different prototypical analog circuits, including a lowpass filter, a crossover (woofer and tweeter) filter, a source identification circuit, an amplifier, a computational circuit, a timeoptimal controller circuit, a temperaturesensing circuit, and a voltage reference circuit. The problemspecific information required for each of the eight problems is minimal and consists primarily of the number of inputs and outputs of the desired circuit, the types of available components, and a fitness measure that restates the highlevel
A 1.9GHz wideband IF double conversion CMOS receiver for cordless telephone applications
 IEEE Journal of SolidState Circuits
, 1997
"... Rapid growth in the portable communications market has pushed designers to seek lowcost, lowpower, highly integrated solutions for the RF transceiver. A number of recent efforts have concentrated on integrating many of the discrete radio receiver components in a lowcost silicon process such as CM ..."
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Cited by 39 (1 self)
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Rapid growth in the portable communications market has pushed designers to seek lowcost, lowpower, highly integrated solutions for the RF transceiver. A number of recent efforts have concentrated on integrating many of the discrete radio receiver components in a lowcost silicon process such as CMOS [1][2]. This paper describes a prototype of a monolithic CMOS receiver that combines RF and baseband functionality by taking the carrier signal at the LNA input and producing a 10bit digital baseband waveform. A WideBand Intermediate Frequency Double Conversion (WBIFDC) architecture is utilized to remove the need for external narrowband IF filters.
Decoding and Equalization with Analog Nonlinear Networks
 EUROPEAN TRANS. COMM
, 1999
"... Using analog, nonlinear and highly parallel networks, we attempt to perform decoding of block and convolutional codes, equalization of certain frequencyselective channels, decoding of multilevel coded modulation and reconstruction of coded PCM signals. This is in contrast to common practice where ..."
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Cited by 21 (4 self)
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Using analog, nonlinear and highly parallel networks, we attempt to perform decoding of block and convolutional codes, equalization of certain frequencyselective channels, decoding of multilevel coded modulation and reconstruction of coded PCM signals. This is in contrast to common practice where these tasks are performed by sequentially operating processors. Our advantage is that we operate fully on soft values for input and output, similar to what is done in `turbo' decoding. However, we do not have explicit iterations because the networks float freely in continuous time. The decoder has almost no latency in time because we are only restricted by the time constants from the parasitic RC values of integrated circuits. Simulation results for several simple examples are shown which, in some cases, achieve the performance of a conventional MAP detector. For more complicated codes we indicate promising solutions with more complex analog networks based on the simple ones. Furthermore,...
Automated synthesis of computational circuits using genetic programming
 Proceedings of the 1997 IEEE Conference on Evolutionary Computation. Piscataway, NJ
, 1997
"... Abstract: Analog electrical circuits that perform mathematical functions (e.g., cube root, square) are called computational circuits. Computational circuits are of special practical importance when the small number of required mathematical functions does not warrant converting an analog signal into ..."
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Cited by 11 (4 self)
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Abstract: Analog electrical circuits that perform mathematical functions (e.g., cube root, square) are called computational circuits. Computational circuits are of special practical importance when the small number of required mathematical functions does not warrant converting an analog signal into a digital signal, performing the mathematical function in the digital domain, and then converting the result back to the analog domain. The design of computational circuits is difficult even for mundane mathematical functions and often relies on the clever exploitation of some aspect of the underlying device physics of the components. Moreover, implementation of each different mathematical function typically requires an entirely different clever insight. This paper demonstrates that computational circuits can be designed without such problemspecific insights using a single uniform approach involving genetic programming. Both the circuit topology and the sizing of all circuit components are created by genetic programming. This uniform approach to the automated synthesis of computational circuits is illustrated by evolving circuits that perform the cube root function (for which no circuit was found in the published literature) as well as for the square root, square, and cube functions. 1.
A Field Programmable Analog Array for Continuous, Fuzzy, and MultiValued Logic Applications
 Proc. 24th ISMVL
"... In this paper we propose a novel approach to the realization of continuous, fiuzy, and multivalued logic (mvl) circuits. We demonstrate how a generalpurpose field programmable analog array (FPAA), with cells realizing simple arithmetic operations on signals, can be used for this purpose. The FPAA, ..."
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Cited by 11 (3 self)
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In this paper we propose a novel approach to the realization of continuous, fiuzy, and multivalued logic (mvl) circuits. We demonstrate how a generalpurpose field programmable analog array (FPAA), with cells realizing simple arithmetic operations on signals, can be used for this purpose. The FPAA, which is being implemented in a bipolar transistor array technology, operates from f3.3V or f s V power supplies and works in the range of frequencies up to several hundred MHz. 1.
A design methodology for highlyintegrated lowpower receivers for wireless communications
, 2001
"... ..."
An Analog VLSI Chip for Estimating the Focus of Expansion
 In 1997 ISSCC Digest of Technical Papers
, 1996
"... For applications involving the control of moving vehicles, the recovery of relative motion between a camera and its environment is of high utility. This thesis describes the design and testing of a realtime analog vlsi chip which estimates the focus of expansion (foe) from measured timevarying ima ..."
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Cited by 6 (1 self)
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For applications involving the control of moving vehicles, the recovery of relative motion between a camera and its environment is of high utility. This thesis describes the design and testing of a realtime analog vlsi chip which estimates the focus of expansion (foe) from measured timevarying images. Our approach assumes a camera moving through a fixed world with translational velocity; the foe is the projection of the translation vector onto the image plane. This location is the point towards which the camera is moving, and other points appear to be expanding outward from. By way of the camera imaging parameters, the location of the foe gives the direction of 3D translation. The algorithm we use for estimating the foe minimizes the sum of squares of the differences at every pixel between the observed time variation of brightness and the predicted variation given the assumed position of the foe. This minimization is not straightforward, because the relationship between the brightn...
Accurate and Precise Computation using Analog VLSI, with Applications to Computer Graphics and Neural Networks
, 1993
"... This thesis develops an engineering practice and design methodology to enable us to use CMOS analog VLSI chips to perform more accurate and precise computation. These techniques form the basis of an approach that permits us to build computer graphics and neural network applications using analog VLSI ..."
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Cited by 3 (1 self)
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This thesis develops an engineering practice and design methodology to enable us to use CMOS analog VLSI chips to perform more accurate and precise computation. These techniques form the basis of an approach that permits us to build computer graphics and neural network applications using analog VLSI. The nature of the design methodology focuses on defining goals for circuit behavior to be met as part of the design process. To increase the accuracy of analog computation, we develop techniques for creating compensated circuit building blocks, where compensation implies the cancellation of device variations, offsets, and nonlinearities. These compensated building blocks can be used as components in larger and more complex circuits, which can then also be compensated. To this end, we develop techniques for automatically determining appropriate parameters for circuits, using constrained optimization. We also fabricate circuits that implement multidimensional gradient estimation for a grad...