Abstract—Envelope distortion in transconductance mixers is analyzed in this paper. The analysis consists of a simplified theoretical study, simulation results, and measurements about several implemented mixers. The studied mixers are active single-balanced and double-balanced structures. A theoretical mismatch analysis is carried out instead of a complex mixer nonlinearity analysis; this gives an intuitive sense of even-order nonlinearity in balanced mixers, and provides information about the fundamental restrictions of second-order input intercept point (IIP2) and the relations of different imbalances to actual performance. The analysis uses a number of simplifying assumptions, but without losing generality. The IIP2 is sensitive to any mismatch in a differential circuit topology. It will be shown that an excellent IIP2 can be achieved in slightly imbalanced conditions by a controllable mismatch device. Index Terms—BiCMOS analog integrated circuits, DC offset, direct conversion, envelope distortion, IIP2, mismatch, mixers, nonlinearity, radio receivers, second-order distortion. I.

This paper presents an overview of the receiver system design. It describes the key system performance requirements derived from the WCDMA specification and provides detailed descriptions of the design and measured performance of the receiver circuits. System performance of the packaged IC is characterized in a receiver test bed that uses a software baseband processor to compute link bit-error rate and estimated code channel signal-to-noise ratio

Applications (Under the direction of Dr. Kevin Gard.) Integration is driving today’s cellular phone industry to create single chip cellphone systems. With the integration of Radio Frequency Transmitters into CMOS technology, robust circuits are needed that can scale with new technologies. This thesis explores the challenges of designing a CMOS RF Driver Amplifier capable of outputting +10dBm of power while meeting strict WCDMA cellphone standards. The driver amplifier (DA) is a 2.5V two-stage amplifier consisting of two on-chip inductors and a gain of greater than 20dB. The driver amplifier has an Adjacent Channel Leakage Ratio (ACLR) of-38.5dBm and-45.5dBm at 5MHz and 10MHz respectively. 30mA of current was consumed from a 2.5V power supply leading to an efficiency of 13.3%. The driver amplifier noise seen in the receive band 190MHz away was-125dBm/Hz. With strict noise constraints, future work will eliminate the need for the off SAW chip filter that is utilized between the driver amplifier and the power amplifier to reduce driver amplifier noise contribution.

Abstract—Long design cycles due to the inability to predict silicon realities are a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens for nanoscale IC technologies, the high cost of design and multiple manufacturing spins causes fewer products to have the volume required to support full-custom implementation. Design reuse and analog synthesis make analog/RF design more affordable; however, the increasing process variability and lack of modeling accuracy remain extremely challenging for nanoscale analog/RF design. We propose a regular analog/RF IC using metal-mask configurability design methodology Optimization with Recourse of Analog Circuits including Layout Extraction (ORACLE), which is a combination of reuse and shared-use by formulating the synthesis problem as an optimization with recourse problem. Using a two-stage geometric programming with recourse approach, ORACLE solves for both the globally optimal shared and application-specific variables. Furthermore, robust optimization is proposed to treat the design with variability problem, further enhancing the ORACLE methodology by providing yield bound for each configuration of regular designs. The statistical variations of the process parameters are captured by a confidence ellipsoid. We demonstrate ORACLE for regular Low Noise Amplifier designs using metal-mask configurability, where a range of applications share common underlying structure and application-specific customization is performed using the metal-mask layers. Two RF oscillator design examples are shown to achieve robust designs with guaranteed yield bound. Index Terms—Configurable design, optimization with recourse, robustness, statistical optimization. I.

First, I want to gratefully acknowledge the enthusiastic supervision of my research advisor, Professor Joy Laskar. He has been a source of inspiration and motivation for my research. Without his guidance and support, this research would not be completed. I am also deeply grateful to Professor Emmanouil M Tentzeris for his valuable support and helpful comments during my research. I also thank the rest of my thesis committee members, Professor Kevin Kornegay, Professor Oliver Brand, and Professor Paul Kaul for their precious time, cooperation and suggestions. I am specially grateful to Dr. Changho Lee for his support and valuable comments on my research, and to Prof. Byungsung Kim at Sungkyunkwan Univ. and Dr. Kyutae Lim for his insightful comments. I am greatly indebted to the members of the Microwave Applications Group for their assistance, cooperation and favors, especially to – Dr. Stephan Pinel, Dr. Kiseok