: The sum-product algorithm (belief/probability propagation) can be naturally mapped into analog transistor circuits. These circuits enable the construction of analog-VLSI decoders for turbo codes, low-density parity-check codes, and similar codes. Index Terms: Turbo codes, iterative decoding, factor graphs, belief propagation, analog circuits. The material in this paper was presented in part at the 1998 IEEE Int. Symp. on Information Theory, Cambridge, MA USA, August 16-21, 1998, and at several other conferences. This research was supported by the Swiss National Science Foundation under Grant 21-49619.96. 1 Now with Signal and Information Processing Lab (ISI), ETH Zentrum, CH-8092 Zrich, Switzerland. The work was performed while with Endora Tech AG, Basel. 2 Signal and Information Processing Lab (ISI), ETH Zentrum, CH-8092 Zrich, Switzerland. 3 Now with Globespan Semiconductor Inc., 100 Schulz Drive, Red Bank, NJ 07701. The work was performed while with ISI/ETH Zurich. 4 Endo...

Analog Viterbi decoders are finding widespread use in class-IV partial-response disk-drive applications. These analog realizations are often used because they are smaller and consume less power than their digital counterparts. However, class-IV signaling allows simplifications during Viterbi detection and thus existing analog decoders have limited applications. The purpose of this paper is to develop efficient analog circuits that can be used for general Viterbi detection. To demonstrate the feasibility of the proposed approach, the analog portions of two analog Viterbi decoders were fabricated in a 0.8-m BiCMOS process. With an off-chip digital path memory, operation up to 50 Mb/s is demonstrated. However, simulations indicate that with on-chip digital path memory, speeds on the order of 300 Mb/s can be achieved. The power consumption of the proposed approach is estimated to be 15 mW/state drawn from a single 5-V power supply. Index Terms---Analog, BiCMOS, communications, Viterbi. I...

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Analog Viterbi Decoder (AVD) is used for decoding of message from the received signal. Very recently mixed signal architecture for OFDM was proposed, that uses FFT processing in the analog domain. In this work, we propose a modified analog Viterbi decoder that performs decoding in analog domain. The proposed analog Viterbi decoder can be used in the mixed signal architecture of OFDM model and hence the proposed architecture is called as Hybrid OFDM architecture. Software reference model of the proposed AVD is developed using Simulink and is verified for its functionality. The Branch Metric Unit (BMU) and the adder unit that forms the subsystems of AVD are optimized for area, power and speed by designing the adders with 24 transistors. The schematic and layout is designed using Virtuoso targeting 130nm technology, the captured design is verified for its functionality using known test vector. A digital Viterbi decoder is also designed with same specifications as that of AVD, and is synthesized using Design Compiler for comparison. From the results obtained it is found that the AVD is 100 time faster, occupies 8 time less are and consumes power less than 86 micro W compared with digital decoder. The proposed AVD is suitable for low power and high speed applications and can be used in Hybrid OFDM architecture. Key words Hybrid OFDM, analog Viterbi decoder, layout design,

Date Approved: August 23, 2011Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius-- and a lot of courage-- to move in the opposite direction.-- Albert EinsteinTo all my sweet family and my beloved wife with the most gratitude that I feel stuck that I cannot show it enoughACKNOWLEDGEMENTS I would first like to express the most gratitude to my advisor, Prof. John Barry, for his encouragement and support during my time at Georgia Tech. He not only has brightened the way when I was totally lost in finding a lighthouse for my research, but also has continuously inspired me with the guidance for my life. I deeply appreciate every opportunity I had to speak with him and learn from him in person. I learned a lot from his rigorous thought process in defining problems, modeling systems, and solving the problems, which will affect me in one way or another throughout the rest of my research activities. I am also indebted to my co-advisor, Prof. Paul Hasler, who has guided me with his invaluable insights on circuit implementation aspects. Being able to be involved in actual circuit implementation was a great advantage for me to maintain a close distance from practical issues. His advice and directions meant a lot to me whenever I was struggling with