Abstract — This paper presents a patterned ground shield inserted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1–2 GHz, the addition of the shield increases the inductor quality factor up to 33 % and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz vg tank can be nearly doubled with a shielded inductor. Index Terms — Inductor, inductor model, patterned ground shield, quality factor, self-resonance, substrate loss, substrate noise coupling. I.

A 900 MHz low-noise amplifier (LNA) utilizing three monolithic transformers to implement on-chip tuning networks and requiring no external components has been integrated in 2.88 mm 2 in a standard digital 0.6 m CMOS process. A bias current reuse technique is employed to reduce power dissipation, and process-, voltage-, and temperature-tracking biasing techniques are used. At 900 MHz, the LNA dissipates 18 mW from a single 3 V power supply and provides 4.1 dB noise figure, 12.3 dB power gain, 00033.0 dB reverse isolation, and an input 1-dB compression level of 00016 dBm. Analysis and modeling considerations for silicon-based monolithic transformers are presented, and it is shown that a monolithic transformer occupies less die area and provides a higher quality factor than two independent inductors with the same effective inductance in differential applications. I. INTRODUCTION F INE-LINE CMOS technology easily provides high frequency active devices for use in RF applications (e...